On Thu, 2022-09-08 at 15:09 +0300, Roger Quadros wrote: > Benedikt, > > > On 06/09/2022 15:47, B. Niedermayr wrote: > > From: Benedikt Niedermayr <benedikt.niedermayr@xxxxxxxxxxx> > > > > The GPMC controller has the ability to configure the polarity for > > the > > wait pin. The current properties do not allow this configuration. > > This binding directly configures the WAITPIN<X>POLARITY bit > > in the GPMC_CONFIG register. > > > > Signed-off-by: Benedikt Niedermayr <benedikt.niedermayr@xxxxxxxxxxx > > > > > --- > > .../bindings/memory-controllers/ti,gpmc-child.yaml | 6 > > ++++++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/memory- > > controllers/ti,gpmc-child.yaml > > b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc- > > child.yaml > > index 6e3995bb1630..a115b544a407 100644 > > --- a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc- > > child.yaml > > +++ b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc- > > child.yaml > > @@ -230,6 +230,12 @@ properties: > > Wait-pin used by client. Must be less than "gpmc,num- > > waitpins". > > $ref: /schemas/types.yaml#/definitions/uint32 > > > > + gpmc,wait-pin-active-low: > > + description: | > > + Set the polarity for the selected wait pin to active low. > > + Defaults to active high if this is not set. > > + type: boolean > > + > > I just checked that the default behaviour is active low. > Reset value of the polarity register field is 0, which means active > low. > > We will need to use the property "gpmc,wait-pin-active-high" instead. > > Sorry for not catching this earlier. It's ok. No worries. Well, the Datasheets are telling me different reset values here. The am335x TRM (Rev. Q) defines the reset value of WAIT1PINPOLARITY as 0x0, whereas the am64x TRM (Rev. C) defines the reset value of WAIT1PIN POLARITY as 0x1. The am64x TRM also defines different reset values for WAIT0PINPOLARITY and WAIT1PINPOLARITY. The interesting thing is that I'm currently working on an am335x platform and I dumped the GPMC_CONFIG register and got 0x00000a00 (WAIT1PINPOLARITY == 0x1). So It doesn't behave like the TRM specifies. Nevertheless, I'm setting the WAITXPINPOLARITY bits in both cases accordingly. 0x0 in case "gpmc,wait-pin-active-low" is set and 0x1 in case "gpmc,wait-pin-active-low" is not set. So the reset value is always overwritten. Using "gpmc,wait-pin-active-high" rather than "gpmc,wait-pin-active-low " is also ok for me, but it feels more like a cosmetic thing at this point. > > > gpmc,wait-on-read: > > description: Enables wait monitoring on reads. > > type: boolean > > cheers, > -roger cheers, benedikt
