[AMD Official Use Only - General] > -----Original Message----- > From: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx> > Sent: Sunday, September 11, 2022 1:12 AM > To: Rob Herring <robh+dt@xxxxxxxxxx>; Krzysztof Kozlowski > <krzysztof.kozlowski+dt@xxxxxxxxxx>; Michal Simek > <michal.simek@xxxxxxxxxx>; Borislav Petkov <bp@xxxxxxxxx>; Mauro > Carvalho Chehab <mchehab@xxxxxxxxxx>; Tony Luck > <tony.luck@xxxxxxxxx>; James Morse <james.morse@xxxxxxx>; Robert > Richter <rric@xxxxxxxxxx>; Shubhrajyoti Datta > <shubhrajyoti.datta@xxxxxxxxxx> > Cc: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx>; Serge Semin > <fancer.lancer@xxxxxxxxx>; Alexey Malahov > <Alexey.Malahov@xxxxxxxxxxxxxxxxxxxx>; Michail Ivanov > <Michail.Ivanov@xxxxxxxxxxxxxxxxxxxx>; Pavel Parkhomenko > <Pavel.Parkhomenko@xxxxxxxxxxxxxxxxxxxx>; Punnaiah Choudary Kalluri > <punnaiah.choudary.kalluri@xxxxxxxxxx>; Manish Narani > <manish.narani@xxxxxxxxxx>; Dinh Nguyen <dinguyen@xxxxxxxxxx>; Rob > Herring <robh@xxxxxxxxxx>; Krzysztof Kozlowski > <krzysztof.kozlowski@xxxxxxxxxx>; devicetree@xxxxxxxxxxxxxxx; linux-arm- > kernel@xxxxxxxxxxxxxxxxxxx; linux-edac@xxxxxxxxxxxxxxx; linux- > kernel@xxxxxxxxxxxxxxx; Borislav Petkov <bp@xxxxxxx> > Subject: [PATCH v2 05/19] EDAC/synopsys: Fix reading errors count before > ECC status > > CAUTION: This message has originated from an External Source. Please use > proper judgment and caution when opening attachments, clicking links, or > responding to this email. > > > Aside with fixing the errors count CSR usage the commit e2932d1f6f05 > ("EDAC/synopsys: Read the error count from the correct register") all of the > sudden has also changed the order of the errors status check procedure. So > now the errors handler method first reads the number of CE and UE and only > then makes sure that any of these errors have actually happened. It doesn't > make much sense. Let's fix that by getting back the procedures order: first > check the ECC status, then read the number of errors. > > Fixes: e2932d1f6f05 ("EDAC/synopsys: Read the error count from the correct > register") > Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx> Reviewed-by: Shubhrajyoti Datta <shubhrajyoti.datta@xxxxxxx> > --- > drivers/edac/synopsys_edac.c | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c > index da1d90a87778..558d3b3e6864 100644 > --- a/drivers/edac/synopsys_edac.c > +++ b/drivers/edac/synopsys_edac.c > @@ -423,18 +423,18 @@ static int zynqmp_get_error_info(struct > synps_edac_priv *priv) > base = priv->baseaddr; > p = &priv->stat; > > - regval = readl(base + ECC_ERRCNT_OFST); > - p->ce_cnt = regval & ECC_ERRCNT_CECNT_MASK; > - p->ue_cnt = (regval & ECC_ERRCNT_UECNT_MASK) >> > ECC_ERRCNT_UECNT_SHIFT; > - if (!p->ce_cnt) > - goto ue_err; > - > regval = readl(base + ECC_STAT_OFST); > if (!regval) > return 1; > > p->ceinfo.bitpos = (regval & ECC_STAT_BITNUM_MASK); > > + regval = readl(base + ECC_ERRCNT_OFST); > + p->ce_cnt = regval & ECC_ERRCNT_CECNT_MASK; > + p->ue_cnt = (regval & ECC_ERRCNT_UECNT_MASK) >> > ECC_ERRCNT_UECNT_SHIFT; > + if (!p->ce_cnt) > + goto ue_err; > + > regval = readl(base + ECC_CEADDR0_OFST); > p->ceinfo.row = (regval & ECC_CEADDR0_RW_MASK); > regval = readl(base + ECC_CEADDR1_OFST); > -- > 2.37.2