At the current state the DW uMCTL2 DDRC DT-schema can't be used as the
common one for all the IP-core-based devices due to the compatible string
property constraining the list of the supported device names. In order to
fix that we suggest to update the compatible property constraints so one
would permit having any value aside with the generic device names. At the
same time the generic DT-schema selection must be restricted to the
denoted generic devices only so not to permit the generic fallback
compatibles. Finally since the generic schema will be referenced from the
vendor-specific DT-bindings with possibly non-standard properties defined
it must permit having additional properties specified.
Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx>
---
Note alternatively we could drop the "additionalProperties" keyword
modification since currently there is no actual device available with the
properties not listed in the generic DT-schema.
Changelog v2:
- This is a new patch created on v2 cycle of the patchset. (@Krzysztof)
---
.../memory-controllers/snps,dw-umctl2-ddrc.yaml | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml b/Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml
index e68c4306025a..a3394b4600ef 100644
--- a/Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml
@@ -21,9 +21,21 @@ description: |
controller. It has an optional SEC/DEC ECC support in 64- and 32-bits
bus width configurations.
+# Please create a separate DT-schema for your DW uMCTL2 DDR controller
+# and make sure it's assigned with the vendor-specific compatible string.
+select:
+ properties:
+ compatible:
+ enum:
+ - snps,ddrc-3.80a
+ - snps,dw-umctl2-ddrc
+ - xlnx,zynqmp-ddrc-2.40a
+ required:
+ - compatible
+
properties:
compatible:
- oneOf:
+ anyOf:
- deprecated: true
description: Synopsys DW uMCTL2 DDR controller v3.80a
const: snps,ddrc-3.80a
@@ -31,6 +43,7 @@ properties:
const: snps,dw-umctl2-ddrc
- description: Xilinx ZynqMP DDR controller v2.40a
const: xlnx,zynqmp-ddrc-2.40a
+ - {}
interrupts:
description:
@@ -87,7 +100,7 @@ required:
- reg
- interrupts
-additionalProperties: false
+additionalProperties: true
examples:
- |
--
2.37.2
