On 08/09/2022 15:44, Zong Li wrote:
Since composable cache may be L3 cache if private L2 cache exists, we
should use its original name "composable cache" to prevent confusion.
This patchset contains the modification which is related to ccache, such
as DT binding and EDAC driver.
The DT binding is based on top of Conor's patch, it has got ready for
merging, and it looks that it would be taken into the next few 6.0-rc
version. If there is any change, the next version of this series will be
posted as well.
https://lore.kernel.org/linux-riscv/20220825180417.1259360-2-mail@xxxxxxxxxxx/
Is there a change log for the v2..v3 versions of this patch series?
Ben Dooks (2):
soc: sifive: ccache: reduce printing on init
soc: sifive: ccache: use pr_fmt() to remove CCACHE: prefixes
Zong Li (4):
dt-bindings: sifive-ccache: change Sifive L2 cache to Composable cache
soc: sifive: ccache: rename SiFive L2 cache to Composable cache.
soc: sifive: ccache: determine the cache level from dts
soc: sifive: ccache: define the macro for the register shifts
...five-l2-cache.yaml => sifive,ccache0.yaml} | 28 ++-
drivers/edac/Kconfig | 2 +-
drivers/edac/sifive_edac.c | 12 +-
drivers/soc/sifive/Kconfig | 6 +-
drivers/soc/sifive/Makefile | 2 +-
.../{sifive_l2_cache.c => sifive_ccache.c} | 200 ++++++++++--------
.../{sifive_l2_cache.h => sifive_ccache.h} | 16 +-
7 files changed, 151 insertions(+), 115 deletions(-)
rename Documentation/devicetree/bindings/riscv/{sifive-l2-cache.yaml => sifive,ccache0.yaml} (83%)
rename drivers/soc/sifive/{sifive_l2_cache.c => sifive_ccache.c} (31%)
rename include/soc/sifive/{sifive_l2_cache.h => sifive_ccache.h} (12%)
