> From: Chen-Yu Tsai <wenst@xxxxxxxxxxxx>
>
> With device frequency scaling, the mux clock that (indirectly) feeds the
> device selects between a dedicated PLL, and some other stable clocks.
>
> When a clk rate change is requested, the (normally) upstream PLL is
> reconfigured. It's possible for the clock output of the PLL to become
> unstable during this process.
>
> To avoid causing the device to glitch, the mux should temporarily be
> switched over to another "stable" clock during the PLL rate change.
> This is done with clk notifiers.
>
> This patch adds common functions for notifiers to temporarily and
> transparently reparent mux clocks.
>
> This was loosely based on commit 8adfb08605a9 ("clk: sunxi-ng: mux: Add
> clk notifier functions").
>
Reviewed-by: Miles Chen <miles.chen@xxxxxxxxxxxx>
