On Fri, Oct 10, 2014 at 01:46:55PM +0100, Tomeu Vizoso wrote: > From: Mikko Perttunen <mperttunen@xxxxxxxxxx> > > Add binding documentation for the nvidia,tegra124-emc device tree node. > > Signed-off-by: Mikko Perttunen <mperttunen@xxxxxxxxxx> > Signed-off-by: Tomeu Vizoso <tomeu.vizoso@xxxxxxxxxxxxx> > --- > .../bindings/memory-controllers/tegra-emc.txt | 41 ++++++++++++++++++++++ > 1 file changed, 41 insertions(+) > create mode 100644 Documentation/devicetree/bindings/memory-controllers/tegra-emc.txt > > diff --git a/Documentation/devicetree/bindings/memory-controllers/tegra-emc.txt b/Documentation/devicetree/bindings/memory-controllers/tegra-emc.txt > new file mode 100644 > index 0000000..6282c6b > --- /dev/null > +++ b/Documentation/devicetree/bindings/memory-controllers/tegra-emc.txt > @@ -0,0 +1,41 @@ > +Tegra124 SoC EMC controller > + > +Required properties : > +- compatible : "nvidia,tegra124-emc". > +- reg : Should contain 1 entry: > + - EMC register set > + > +The node should contain a "timings@i" subnode for each supported RAM type > + (see field RAM_CODE in register PMC_STRAPPING_OPT_A) > +Required properties for "timings@i" nodes : > +- nvidia,ram-code : Should contain the value of RAM_CODE this timing set > + is used for. > + > +Each "timings@i" node should contain "timing@j" subnodes. One "timing@j" > + node should exist for each supported EMC clock rate. What do the i and j correspond to? > +Required properties for "timing@j" nodes : > +- clock-frequency : Should contain the memory clock rate. > +- nvidia,parent-clock-frequency : Should contain the rate of the EMC > + clock's parent clock. Why are both of these properties necessary? What is the relationship between the two? > +- clocks : Must contain an entry for each entry in clock-names. > + See ../clocks/clock-bindings.txt for details. > +- clock-names : Must include the following entries: > + - emc-parent : EMC's parent clock. Surely the clocks are a property of the EMC, and not the individual timings? > +- The following properties contain EMC timing characterization values: > + - nvidia,emc-zcal-cnt-long > + - nvidia,emc-auto-cal-interval > + - nvidia,emc-ctt-term-ctrl > + - nvidia,emc-cfg > + - nvidia,emc-cfg-2 > + - nvidia,emc-sel-dpd-ctrl > + - nvidia,emc-cfg-dig-dll > + - nvidia,emc-bgbias-ctl0 > + - nvidia,emc-auto-cal-config > + - nvidia,emc-auto-cal-config2 > + - nvidia,emc-auto-cal-config3 > + - nvidia,emc-mode-reset > + - nvidia,emc-mode-1 > + - nvidia,emc-mode-2 > + - nvidia,emc-mode-4 > +- nvidia,emc-configuration : EMC timing characterization data written to > + EMC registers. I have no idea what any of these are. Perhaps these make sense, but I cannot tell. Mark. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
