> -----Original Message-----
> From: Shawn Guo <shawnguo@xxxxxxxxxx>
> Sent: Friday, September 2, 2022 10:48 PM
> To: Shenwei Wang <shenwei.wang@xxxxxxx>
> Cc: Rob Herring <robh+dt@xxxxxxxxxx>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@xxxxxxxxxx>; Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>;
> Pengutronix Kernel Team <kernel@xxxxxxxxxxxxxx>; Peng Fan
> <peng.fan@xxxxxxx>; devicetree@xxxxxxxxxxxxxxx; linux-arm-
> kernel@xxxxxxxxxxxxxxxxxxx; imx@xxxxxxxxxxxxxxx; dl-linux-imx <linux-
> imx@xxxxxxx>
> Subject: [EXT] Re: [PATCH v6 5/5] arm64: dts: freescale: add support for
> i.MX8DXL EVK board
>
> > + regulator-always-on;
> > + };
> > +
> > + reg_fec1_sel: regulator-1 {
> > + compatible = "regulator-fixed";
> > + regulator-name = "fec1_supply";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>;
>
> Missing enable-active-high?
No. Enabling this regulator to select the fec1 interface instead of usdhc2. Pulling this GPIO pin to low is to use FEC1 interface.
>
> > + regulator-always-on;
> > + status = "disabled";
> > + };
> > +
> > + reg_fec1_io: regulator-2 {
> > + compatible = "regulator-fixed";
> > + regulator-name = "fec1_io_supply";
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <1800000>;
...
> > + fsl,magic-packet;
> > + rx-internal-delay-ps = <2000>;
> > + nvmem-cells = <&fec_mac0>;
> > + nvmem-cell-names = "mac-address";
> > + phy-reset-gpios = <&pca6416_1 0 GPIO_ACTIVE_LOW>;
> > + phy-reset-duration = <10>;
> > + phy-reset-post-delay = <150>;
>
> These are listed as deprecated optional properties in fsl,fec.yaml.
Will move the reset properties to phy node according to the new rule.
Thanks,
Shenwei
>
> Shawn
>
> > + status = "disabled";
> > +
> > + mdio {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + ethphy1: ethernet-phy@1 {
> > + compatible = "ethernet-phy-ieee802.3-c22";
> > + reg = <1>;
> > + qca,disable-smarteee;
> > + vddio-supply = <&vddio1>;
> > +
> > + vddio1: vddio-regulator {
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <1800000>;
> > + };
> > + };
> > + };
> > +};
> > +
> > +&i2c2 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + clock-frequency = <100000>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c2>;
> > + status = "okay";
> > +
> > + pca6416_1: gpio@20 {
> > + compatible = "ti,tca6416";
> > + reg = <0x20>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > + };
> > +
> > + pca6416_2: gpio@21 {
> > + compatible = "ti,tca6416";
> > + reg = <0x21>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > + };
> > +
> > + pca9548_1: i2c-mux@70 {
> > + compatible = "nxp,pca9548";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0x70>;
> > +
> > + i2c@0 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0x0>;
> > +
> > + max7322: gpio@68 {
> > + compatible = "maxim,max7322";
> > + reg = <0x68>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > + status = "disabled";
> > + };
> > + };
> > +
> > + i2c@4 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0x4>;
> > + };
> > +
> > + i2c@5 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0x5>;
> > + };
> > +
> > + i2c@6 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0x6>;
> > + };
> > + };
> > +};
> > +
> > +&lpuart0 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_lpuart0>;
> > + status = "okay";
> > +};
> > +
> > +&lsio_gpio4 {
> > + status = "okay";
> > +};
> > +
> > +&lsio_gpio5 {
> > + status = "okay";
> > +};
> > +
> > +&thermal_zones {
> > + pmic-thermal0 {
> > + polling-delay-passive = <250>;
> > + polling-delay = <2000>;
> > + thermal-sensors = <&tsens IMX_SC_R_PMIC_0>;
> > +
> > + trips {
> > + pmic_alert0: trip0 {
> > + temperature = <110000>;
> > + hysteresis = <2000>;
> > + type = "passive";
> > + };
> > +
> > + pmic_crit0: trip1 {
> > + temperature = <125000>;
> > + hysteresis = <2000>;
> > + type = "critical";
> > + };
> > + };
> > +
> > + cooling-maps {
> > + map0 {
> > + trip = <&pmic_alert0>;
> > + cooling-device =
> > + <&A35_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > + <&A35_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> > + };
> > + };
> > + };
> > +};
> > +
> > +&usdhc1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_usdhc1>;
> > + bus-width = <8>;
> > + no-sd;
> > + no-sdio;
> > + non-removable;
> > + status = "okay";
> > +};
> > +
> > +&usdhc2 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
> > + bus-width = <4>;
> > + vmmc-supply = <®_usdhc2_vmmc>;
> > + cd-gpios = <&lsio_gpio5 1 GPIO_ACTIVE_LOW>;
> > + wp-gpios = <&lsio_gpio5 0 GPIO_ACTIVE_HIGH>;
> > + status = "okay";
> > +};
> > +
> > +&iomuxc {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_hog>;
> > +
> > + pinctrl_hog: hoggrp {
> > + fsl,pins = <
> > + IMX8DXL_COMP_CTL_GPIO_1V8_3V3_GPIORHB_PAD
> 0x000514a0
> > + IMX8DXL_COMP_CTL_GPIO_1V8_3V3_GPIORHK_PAD
> 0x000014a0
> > + IMX8DXL_SPI3_CS0_ADMA_ACM_MCLK_OUT1
> 0x0600004c
> > + IMX8DXL_SNVS_TAMPER_OUT1_LSIO_GPIO2_IO05_IN
> 0x0600004c
> > + >;
> > + };
> > +
> > + pinctrl_usbotg1: usbotg1grp {
> > + fsl,pins = <
> > + IMX8DXL_USB_SS3_TC0_CONN_USB_OTG1_PWR
> 0x00000021
> > + >;
> > + };
> > +
> > + pinctrl_usbotg2: usbotg2grp {
> > + fsl,pins = <
> > + IMX8DXL_USB_SS3_TC1_CONN_USB_OTG2_PWR
> 0x00000021
> > + >;
> > + };
> > +
> > + pinctrl_eqos: eqosgrp {
> > + fsl,pins = <
> > + IMX8DXL_ENET0_MDC_CONN_EQOS_MDC
> 0x06000020
> > + IMX8DXL_ENET0_MDIO_CONN_EQOS_MDIO
> 0x06000020
> > + IMX8DXL_ENET1_RGMII_RXC_CONN_EQOS_RGMII_RXC
> 0x06000020
> > + IMX8DXL_ENET1_RGMII_RXD0_CONN_EQOS_RGMII_RXD0
> 0x06000020
> > + IMX8DXL_ENET1_RGMII_RXD1_CONN_EQOS_RGMII_RXD1
> 0x06000020
> > + IMX8DXL_ENET1_RGMII_RXD2_CONN_EQOS_RGMII_RXD2
> 0x06000020
> > + IMX8DXL_ENET1_RGMII_RXD3_CONN_EQOS_RGMII_RXD3
> 0x06000020
> > + IMX8DXL_ENET1_RGMII_RX_CTL_CONN_EQOS_RGMII_RX_CTL
> 0x06000020
> > + IMX8DXL_ENET1_RGMII_TXC_CONN_EQOS_RGMII_TXC
> 0x06000020
> > + IMX8DXL_ENET1_RGMII_TXD0_CONN_EQOS_RGMII_TXD0
> 0x06000020
> > + IMX8DXL_ENET1_RGMII_TXD1_CONN_EQOS_RGMII_TXD1
> 0x06000020
> > + IMX8DXL_ENET1_RGMII_TXD2_CONN_EQOS_RGMII_TXD2
> 0x06000020
> > + IMX8DXL_ENET1_RGMII_TXD3_CONN_EQOS_RGMII_TXD3
> 0x06000020
> > + IMX8DXL_ENET1_RGMII_TX_CTL_CONN_EQOS_RGMII_TX_CTL
> 0x06000020
> > + >;
> > + };
> > +
> > + pinctrl_fec1: fec1grp {
> > + fsl,pins = <
> > + IMX8DXL_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD
> 0x000014a0
> > + IMX8DXL_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB1_PAD
> 0x000014a0
> > + IMX8DXL_ENET0_MDC_CONN_ENET0_MDC
> 0x06000020
> > + IMX8DXL_ENET0_MDIO_CONN_ENET0_MDIO
> 0x06000020
> > + IMX8DXL_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC
> 0x00000060
> > + IMX8DXL_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0
> 0x00000060
> > + IMX8DXL_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1
> 0x00000060
> > + IMX8DXL_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2
> 0x00000060
> > + IMX8DXL_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3
> 0x00000060
> > + IMX8DXL_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL
> 0x00000060
> > + IMX8DXL_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC
> 0x00000060
> > + IMX8DXL_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0
> 0x00000060
> > + IMX8DXL_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1
> 0x00000060
> > + IMX8DXL_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2
> 0x00000060
> > + IMX8DXL_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3
> 0x00000060
> > + IMX8DXL_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL
> 0x00000060
> > + >;
> > + };
> > +
> > + pinctrl_lpspi3: lpspi3grp {
> > + fsl,pins = <
> > + IMX8DXL_SPI3_SCK_ADMA_SPI3_SCK 0x6000040
> > + IMX8DXL_SPI3_SDO_ADMA_SPI3_SDO 0x6000040
> > + IMX8DXL_SPI3_SDI_ADMA_SPI3_SDI 0x6000040
> > + IMX8DXL_SPI3_CS1_ADMA_SPI3_CS1 0x6000040
> > + >;
> > + };
> > +
> > + pinctrl_i2c2: i2c2grp {
> > + fsl,pins = <
> > + IMX8DXL_SPI1_SCK_ADMA_I2C2_SDA 0x06000021
> > + IMX8DXL_SPI1_SDO_ADMA_I2C2_SCL 0x06000021
> > + >;
> > + };
> > +
> > + pinctrl_cm40_lpuart: cm40lpuartgrp {
> > + fsl,pins = <
> > + IMX8DXL_ADC_IN2_M40_UART0_RX 0x06000020
> > + IMX8DXL_ADC_IN3_M40_UART0_TX 0x06000020
> > + >;
> > + };
> > +
> > + pinctrl_i2c3: i2c3grp {
> > + fsl,pins = <
> > + IMX8DXL_SPI1_CS0_ADMA_I2C3_SDA 0x06000021
> > + IMX8DXL_SPI1_SDI_ADMA_I2C3_SCL 0x06000021
> > + >;
> > + };
> > +
> > + pinctrl_lpuart0: lpuart0grp {
> > + fsl,pins = <
> > + IMX8DXL_UART0_RX_ADMA_UART0_RX 0x06000020
> > + IMX8DXL_UART0_TX_ADMA_UART0_TX 0x06000020
> > + >;
> > + };
> > +
> > + pinctrl_usdhc1: usdhc1grp {
> > + fsl,pins = <
> > + IMX8DXL_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041
> > + IMX8DXL_EMMC0_CMD_CONN_EMMC0_CMD 0x00000021
> > + IMX8DXL_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000021
> > + IMX8DXL_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000021
> > + IMX8DXL_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000021
> > + IMX8DXL_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000021
> > + IMX8DXL_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000021
> > + IMX8DXL_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000021
> > + IMX8DXL_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000021
> > + IMX8DXL_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000021
> > + IMX8DXL_EMMC0_STROBE_CONN_EMMC0_STROBE
> 0x00000041
> > + >;
> > + };
> > +
> > + pinctrl_usdhc2_gpio: usdhc2gpiogrp {
> > + fsl,pins = <
> > + IMX8DXL_ENET0_RGMII_TX_CTL_LSIO_GPIO4_IO30
> 0x00000040 /* RESET_B */
> > + IMX8DXL_ENET0_RGMII_TXD1_LSIO_GPIO5_IO00
> 0x00000021 /* WP */
> > + IMX8DXL_ENET0_RGMII_TXD2_LSIO_GPIO5_IO01
> 0x00000021 /* CD */
> > + >;
> > + };
> > +
> > + pinctrl_usdhc2: usdhc2grp {
> > + fsl,pins = <
> > + IMX8DXL_ENET0_RGMII_RXC_CONN_USDHC1_CLK
> 0x06000041
> > + IMX8DXL_ENET0_RGMII_RX_CTL_CONN_USDHC1_CMD
> 0x00000021
> > + IMX8DXL_ENET0_RGMII_RXD0_CONN_USDHC1_DATA0
> 0x00000021
> > + IMX8DXL_ENET0_RGMII_RXD1_CONN_USDHC1_DATA1
> 0x00000021
> > + IMX8DXL_ENET0_RGMII_RXD2_CONN_USDHC1_DATA2
> 0x00000021
> > + IMX8DXL_ENET0_RGMII_RXD3_CONN_USDHC1_DATA3
> 0x00000021
> > + IMX8DXL_ENET0_RGMII_TXD0_CONN_USDHC1_VSELECT
> 0x00000021
> > + >;
> > + };
> > +};
> > --
> > 2.25.1
> >
