> -----Original Message----- > From: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx> > Sent: 2022年8月31日 0:46 > To: Hongxing Zhu <hongxing.zhu@xxxxxxx>; l.stach@xxxxxxxxxxxxxx; > bhelgaas@xxxxxxxxxx; lorenzo.pieralisi@xxxxxxx; robh@xxxxxxxxxx; > shawnguo@xxxxxxxxxx; vkoul@xxxxxxxxxx; alexander.stein@xxxxxxxxxxxxxxx; > marex@xxxxxxx; richard.leitner@xxxxxxxxx > Cc: linux-phy@xxxxxxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; > linux-pci@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; > linux-kernel@xxxxxxxxxxxxxxx; kernel@xxxxxxxxxxxxxx; dl-linux-imx > <linux-imx@xxxxxxx> > Subject: Re: [PATCH v5 4/7] reset: imx7: Fix the iMX8MP PCIe PHY PERST > support > > Hi, > > On Di, 2022-08-30 at 15:46 +0800, Richard Zhu wrote: > > On i.MX7/iMX8MM/iMX8MQ, the initialized default value of PERST > > bit(BIT3) of SRC_PCIEPHY_RCR is 1b'1. > > But i.MX8MP has one inversed default value 1b'0 of PERST bit. > > > > And the PERST bit should be kept 1b'1 after power and clocks are stable. > > So fix the i.MX8MP PCIe PHY PERST support here. > > > > Fixes: e08672c03981 ("reset: imx7: Add support for i.MX8MP SoC") > > Signed-off-by: Richard Zhu <hongxing.zhu@xxxxxxx> > > Reviewed-by: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx> > > Tested-by: Marek Vasut <marex@xxxxxxx> > > Tested-by: Richard Leitner <richard.leitner@xxxxxxxxxxx> > > Tested-by: Alexander Stein <alexander.stein@xxxxxxxxxxxxxxx> > > I've applied this patch to the reset/fixes branch. > Thanks a lot. Best Regards Richard Zhu > regards > Philipp