On Tue, Aug 30, 2022 at 05:31:07AM +0000, Manne, Nava kishore wrote: > Hi Krzysztof, > > Please find my response inline. > > > -----Original Message----- > > From: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> > > Sent: Wednesday, August 24, 2022 6:29 PM > > To: Manne, Nava kishore <nava.kishore.manne@xxxxxxx>; git (AMD-Xilinx) > > <git@xxxxxxx>; robh+dt@xxxxxxxxxx; krzysztof.kozlowski+dt@xxxxxxxxxx; > > michal.simek@xxxxxxxxxx; mdf@xxxxxxxxxx; hao.wu@xxxxxxxxx; > > yilun.xu@xxxxxxxxx; trix@xxxxxxxxxx; p.zabel@xxxxxxxxxxxxxx; > > gregkh@xxxxxxxxxxxxxxxxxxx; ronak.jain@xxxxxxxxxx; rajan.vaja@xxxxxxxxxx; > > abhyuday.godhasara@xxxxxxxxxx; piyush.mehta@xxxxxxxxxx; > > lakshmi.sai.krishna.potthuri@xxxxxxxxxx; harsha.harsha@xxxxxxxxxx; > > linus.walleij@xxxxxxxxxx; nava.manne@xxxxxxxxxx; > > devicetree@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; linux- > > kernel@xxxxxxxxxxxxxxx; linux-fpga@xxxxxxxxxxxxxxx > > Subject: Re: [PATCH 2/4] bindings: fpga: Add binding doc for the zynqmp afi > > config driver > > > > On 24/08/2022 06:55, Nava kishore Manne wrote: > > > Xilinx Zynq US+ MPSoC platform connect the PS to the programmable > > > logic(PL) through the AXI port. This AXI port helps to establish > > > > Use subject prefixes matching the subsystem (git log --oneline -- ...). > > > > Will fix in v2. This is what we assume. No need to reply back with agreement, and save us some mail to read. Rob
