On 30/08/2022 13:20, Conor Dooley wrote:
>[PATCH v3 0/5] Add PolarFire SoC Fabric Clock Conditioning Circuitry Support
>
> Changes since v3:
woops, I forgot to increment the version number!
I will resend.
> - return devm_of_clk_add_hw_provider() directly in probe
> - add a `hw_data.num = num_clks` that got lost along the way somewhere
> - mark all output clocks as CLK_DIVIDER_ONE_BASED
>
> Changes since v2:
> - Removed the unintentionaly leftover clock-output-names
> - Dropped the riscv/microchip dt-binding update. I am moving it to
> another series so that another series for the dts, which is likely to
> be applied first would not depend on this series.
>
> Changes since v1:
> - Stopped using the dt node name to generate the clk name. Rather than
> use clock-output-names etc, I just opted to call each PLL after it's
> individual base address:
> cccrefclk
> ccc@38100000_pll0
> ccc@38100000_pll0_out3
> ccc@38100000_pll0_out2
> ccc@38100000_pll0_out1
> ccc@38100000_pll0_out0
> - dt nodes are now all called "clock-controller"
>
> Conor Dooley (5):
> dt-bindings: clk: rename mpfs-clkcfg binding
> dt-bindings: clk: document PolarFire SoC fabric clocks
> dt-bindings: clk: add PolarFire SoC fabric clock ids
> clk: microchip: add PolarFire SoC fabric clock support
> riscv: dts: microchip: add the mpfs' fabric clock control
>
> .../bindings/clock/microchip,mpfs-ccc.yaml | 80 +++++
> ...p,mpfs.yaml => microchip,mpfs-clkcfg.yaml} | 2 +-
> .../dts/microchip/mpfs-icicle-kit-fabric.dtsi | 27 +-
> .../boot/dts/microchip/mpfs-icicle-kit.dts | 4 +
> .../dts/microchip/mpfs-polarberry-fabric.dtsi | 5 +
> arch/riscv/boot/dts/microchip/mpfs.dtsi | 34 +-
> drivers/clk/microchip/Makefile | 1 +
> drivers/clk/microchip/clk-mpfs-ccc.c | 290 ++++++++++++++++++
> .../dt-bindings/clock/microchip,mpfs-clock.h | 23 ++
> 9 files changed, 453 insertions(+), 13 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml
> rename Documentation/devicetree/bindings/clock/{microchip,mpfs.yaml => microchip,mpfs-clkcfg.yaml} (96%)
> create mode 100644 drivers/clk/microchip/clk-mpfs-ccc.c
>
>
> base-commit: b90cb1053190353cc30f0fef0ef1f378ccc063c5
