[PATCHv2] arm: dts: socfpga: Add SPI nodes to SOCFPGA DT.

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From: Thor Thayer <tthayer@xxxxxxxxxxxxxxxxxxxxx>

Add 2 SPI nodes to SOCFPGA device tree.

Signed-off-by: Thor Thayer <tthayer@xxxxxxxxxxxxxxxxxxxxx>
---
v2: Remove extra files. Move SPIDEV into board specific file.
---
 arch/arm/boot/dts/socfpga.dtsi          |   24 ++++++++++++++++++++++++
 arch/arm/boot/dts/socfpga_cyclone5.dtsi |   10 ++++++++++
 2 files changed, 34 insertions(+)

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 4d77ad6..d81bc2d3 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -628,6 +628,30 @@
 			clock-names = "biu", "ciu";
 		};
 
+		spi0: spi@fff00000 {
+			compatible = "snps,dw-apb-ssi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfff00000 0x1000>;
+			interrupts = <0 154 4>;
+			num-cs = <4>;
+			bus-num = <0>;
+			clocks = <&spi_m_clk>;
+			status = "disabled";
+		};
+
+		spi1: spi@fff01000 {
+			compatible = "snps,dw-apb-ssi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfff01000 0x1000>;
+			interrupts = <0 156 4>;
+			num-cs = <4>;
+			bus-num = <1>;
+			clocks = <&spi_m_clk>;
+			status = "disabled";
+		};
+
 		/* Local timer */
 		timer@fffec600 {
 			compatible = "arm,cortex-a9-twd-timer";
diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
index bf51182..85c6b5c 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
+++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
@@ -48,5 +48,15 @@
 		sysmgr@ffd08000 {
 			cpu1-start-addr = <0xffd080c4>;
 		};
+
+		spi0: spi@fff00000 {
+			status = "okay";
+
+			spidev@0 {
+				compatible = "spidev";
+				reg = <0>;	/* chip select */
+				spi-max-frequency = <100000000>;
+			};
+		};
 	};
 };
-- 
1.7.9.5

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