On 30/08/2022 07:40, Claudiu Beznea - M18063 wrote: > On 19.08.2022 12:53, Conor Dooley wrote: >> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe >> >> Add a reset controller to PolarFire SoC's clock driver. This reset >> controller is registered as an aux device and read/write functions >> exported to the drivers namespace so that the reset controller can >> access the peripheral device reset register. >> >> Reviewed-by: Daire McNamara <daire.mcnamara@xxxxxxxxxxxxx> >> Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> >> --- >> +static int mpfs_reset_controller_register(struct mpfs_clock_data *clk_data) >> +{ >> + struct auxiliary_device *adev; >> + int ret; >> + >> + adev = mpfs_reset_adev_alloc(clk_data); >> + if (IS_ERR(adev)) >> + return PTR_ERR(adev); >> + >> + ret = auxiliary_device_add(adev); >> + if (ret) { >> + auxiliary_device_uninit(adev); >> + return ret; >> + } >> + >> + ret = devm_add_action_or_reset(clk_data->dev, mpfs_reset_unregister_adev, adev); >> + if (ret) >> + return ret; >> + >> + return 0; > > You can just: > return ret; > or: > return devm_add_action_or_reset(); > >> +} >> + >> +#else /* !CONFIG_RESET_CONTROLLER */ >> + >> +static int mpfs_reset_controller_register(struct mpfs_clock_data *clk_data) >> +{ >> + return 0; >> +} >> + >> +#endif /* !CONFIG_RESET_CONTROLLER */ >> + >> static int mpfs_clk_probe(struct platform_device *pdev) >> { >> struct device *dev = &pdev->dev; >> @@ -465,6 +553,8 @@ static int mpfs_clk_probe(struct platform_device *pdev) >> return PTR_ERR(clk_data->msspll_base); >> >> clk_data->hw_data.num = num_clks; >> + clk_data->dev = dev; >> + dev_set_drvdata(dev, clk_data); >> >> ret = mpfs_clk_register_mssplls(dev, mpfs_msspll_clks, ARRAY_SIZE(mpfs_msspll_clks), >> clk_data); >> @@ -484,6 +574,10 @@ static int mpfs_clk_probe(struct platform_device *pdev) >> if (ret) >> return ret; >> >> + ret = mpfs_reset_controller_register(clk_data); >> + if (ret) >> + return ret; >> + >> return ret; > > Ditto > >> } >> willdo^2 Thanks, Conor.