Hi Yilun, Please find my response inline. > -----Original Message----- > From: Xu Yilun <yilun.xu@xxxxxxxxx> > Sent: Saturday, August 27, 2022 11:33 AM > To: Manne, Nava kishore <nava.kishore.manne@xxxxxxx> > Cc: git (AMD-Xilinx) <git@xxxxxxx>; robh+dt@xxxxxxxxxx; > krzysztof.kozlowski+dt@xxxxxxxxxx; michal.simek@xxxxxxxxxx; > mdf@xxxxxxxxxx; hao.wu@xxxxxxxxx; trix@xxxxxxxxxx; > p.zabel@xxxxxxxxxxxxxx; gregkh@xxxxxxxxxxxxxxxxxxx; > ronak.jain@xxxxxxxxxx; rajan.vaja@xxxxxxxxxx; > abhyuday.godhasara@xxxxxxxxxx; piyush.mehta@xxxxxxxxxx; > lakshmi.sai.krishna.potthuri@xxxxxxxxxx; harsha.harsha@xxxxxxxxxx; > linus.walleij@xxxxxxxxxx; nava.manne@xxxxxxxxxx; > devicetree@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; linux- > kernel@xxxxxxxxxxxxxxx; linux-fpga@xxxxxxxxxxxxxxx > Subject: Re: [PATCH 0/4]Add afi config drivers support > > CAUTION: This message has originated from an External Source. Please use > proper judgment and caution when opening attachments, clicking links, or > responding to this email. > > > On 2022-08-24 at 09:25:38 +0530, Nava kishore Manne wrote: > > Xilinx SoC platforms (Zynq and ZynqMP) connect the PS to the > > programmable > > Could you help explain what is PS? > The Zynq UltraScale MPSoC family consists of a system-on-chip (SoC) style integrated processing system (PS) and a Programmable Logic (PL) unit, providing an extensible and flexible SoC solution on a single die. Will add PS description in next version. Regards, Navakishore.
