On Sun, Aug 14, 2022 at 12:36:54PM -0500, Samuel Holland wrote: > Some NVMEM devices contain cells which do not start at a multiple of the > device's stride. However, the "reg" property of a cell must be aligned > to its provider device's stride. How is a DT author supposed to know this? I would lean toward it's the OS's problem to deal with (your option 1 I guess). I worry that one client could expect it one way and another client the other. Or folks making DT changes to 'fix' things. > > These cells can be represented in the DT using the "bits" property if > that property allows offsets up to the full stride. 63 is chosen > assuming that NVMEM devices will not have strides larger than 8 bytes. > > Signed-off-by: Samuel Holland <samuel@xxxxxxxxxxxx> > --- > > Documentation/devicetree/bindings/nvmem/nvmem.yaml | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/nvmem/nvmem.yaml b/Documentation/devicetree/bindings/nvmem/nvmem.yaml > index 3bb349c634cb..4f440ab6a13c 100644 > --- a/Documentation/devicetree/bindings/nvmem/nvmem.yaml > +++ b/Documentation/devicetree/bindings/nvmem/nvmem.yaml > @@ -53,7 +53,7 @@ patternProperties: > $ref: /schemas/types.yaml#/definitions/uint32-array > items: > - minimum: 0 > - maximum: 7 > + maximum: 63 > description: > Offset in bit within the address range specified by reg. > - minimum: 1 > -- > 2.35.1 > >
