On 18/07/2022 20:50, Rob Herring wrote:
On Sun, Jul 10, 2022 at 12:00:40PM +0300, Dmitry Baryshkov wrote:
Move properties common to all DPU DT nodes to the dpu-common.yaml.
Note, this removes description of individual DPU port@ nodes. However
such definitions add no additional value. The reg values do not
correspond to hardware INTF indices. The driver discovers and binds
these ports not paying any care for the order of these items. Thus just
leave the reference to graph.yaml#/properties/ports and the description.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
---
.../bindings/display/msm/dpu-common.yaml | 42 ++++++++++++++++++
.../bindings/display/msm/dpu-msm8998.yaml | 43 ++-----------------
.../bindings/display/msm/dpu-qcm2290.yaml | 39 ++---------------
.../bindings/display/msm/dpu-sc7180.yaml | 43 ++-----------------
.../bindings/display/msm/dpu-sc7280.yaml | 43 ++-----------------
.../bindings/display/msm/dpu-sdm845.yaml | 43 ++-----------------
6 files changed, 62 insertions(+), 191 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/msm/dpu-common.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-common.yaml b/Documentation/devicetree/bindings/display/msm/dpu-common.yaml
new file mode 100644
index 000000000000..14eda883e149
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/dpu-common.yaml
@@ -0,0 +1,42 @@
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/dpu-common.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Display DPU dt properties (common properties)
+
+maintainers:
+ - Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
+ - Krishna Manikandan <quic_mkrishn@xxxxxxxxxxx>
+ - Rob Clark <robdclark@xxxxxxxxx>
+
+description: |
+ Common properties for QCom DPU display controller.
+
+properties:
+ interrupts:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ operating-points-v2: true
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+ description: |
+ Contains the list of output ports from DPU device. These ports
+ connect to interfaces that are external to the DPU hardware,
+ such as DSI, DP etc.
From the last version:
In case of MDSS all ports are output, they are connected to the external
interfaces (DSI, DP, HDMI, etc). The driver uses them to bind available
interfaces (using components framework). The reg property of the port is
completely ignored.
It doesn't matter what the driver does or doesn't do. Without
describing port nodes at all, you are not validating what port nodes
can contain. Just try adding any property under a port node. You need at
least:
'^port@[0-N]$':
$ref: graph.yaml#/properties/port
Hmm, the graph.yaml already restricts the ports node to the
ports@[0-9a-f]+$ + #address-cells/#size-cells. I don't think we have to
add any additional restrictions/entries here. Do we?
where N is the max number of ports.
Rob
--
With best wishes
Dmitry
