[PATCH v3 0/2] serial: pl011: Add xilinx uart

[Shubhrajyoti Datta <shubhrajyoti.datta@xxxxxxx>]

From: Shubhrajyoti Datta <shubhrajyoti.datta@xxxxxxxxxx>

-Support uart peripheral in Xilinx Versal SOC.
Add parameter reg-io-width.
Add the dt-binding for the same

v2: 
Update the commit message to reflect the AXI limitation.

v3:
Add reg-io-width.


Shubhrajyoti Datta (2):
  dt-bindings: serial: pl011: Add a reg-io-width parameter
  serial: pl011: Add reg-io-width parameters

 .../devicetree/bindings/serial/pl011.yaml        |  7 +++++++
 drivers/tty/serial/amba-pl011.c                  | 16 ++++++++++++++++
 2 files changed, 23 insertions(+)

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2.17.1