Hi Rob, Thank you for the review. On Wed, Jul 27, 2022 at 4:37 PM Rob Herring <robh@xxxxxxxxxx> wrote: > > On Tue, Jul 26, 2022 at 06:45:25PM +0100, Lad Prabhakar wrote: > > The CPG block on the RZ/Five SoC is almost identical to one found on the > > RZ/G2UL SoC. "renesas,r9a07g043-cpg" compatible string will be used on > > the RZ/Five SoC so to make this clear, update the comment to include > > RZ/Five SoC. > > It's either the same part or it isn't. 'almost identical' doesn't sound > like the former. Unless it's the former, it's a nak for me. > It's the latter. > Litering the drivers with #ifdef CONFIG_ARM64/CONFIG_RISCV is not great > either. That's not great for compile coverage and they have nothing to > do with the architecture. > Geert any thoughts? Cheers, Prabhakar > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > --- > > Note the driver changes [0] have been already queued for v5.20. > > > > [0] https://patchwork.kernel.org/project/linux-renesas-soc/cover/ > > 20220622181723.13033-1-prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx/ > > --- > > Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml b/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml > > index d036675e0779..487f74cdc749 100644 > > --- a/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml > > +++ b/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml > > @@ -24,7 +24,7 @@ description: | > > properties: > > compatible: > > enum: > > - - renesas,r9a07g043-cpg # RZ/G2UL{Type-1,Type-2} > > + - renesas,r9a07g043-cpg # RZ/G2UL{Type-1,Type-2} and RZ/Five > > - renesas,r9a07g044-cpg # RZ/G2{L,LC} > > - renesas,r9a07g054-cpg # RZ/V2L > > - renesas,r9a09g011-cpg # RZ/V2M > > -- > > 2.17.1 > > > >
