Hi Rob, Thank you for the review. On Wed, Jul 27, 2022 at 4:40 PM Rob Herring <robh@xxxxxxxxxx> wrote: > > On Tue, Jul 26, 2022 at 06:53:15PM +0100, Lad Prabhakar wrote: > > RZ/Five SoC is pin compatible with RZ/G2UL (Type 1) SoC. This patch > > updates the comment to include RZ/Five SoC so that we make it clear > > "renesas,r9a07g043-pinctrl" compatible string will be used for RZ/Five > > SoC. > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > --- > > .../devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > Same comments as here[1]. > This block is identical on RZ/G2UL and RZ/Five SoC. > Rob > > [1] https://lore.kernel.org/all/20220727153738.GA2696116-robh@xxxxxxxxxx/ Cheers, Prabhakar
