On 08/08/2022 19:08, Patrice CHOTARD wrote: > Hi Krzystof > > On 8/8/22 11:01, Krzysztof Kozlowski wrote: >> On 08/08/2022 10:40, patrice.chotard@xxxxxxxxxxx wrote: >>> From: Patrice Chotard <patrice.chotard@xxxxxxxxxxx> >>> >>> Add new property st,dual-flash which allows to use the QSPI interface as a >>> communication channel using up to 8 qspi line. >>> This mode can only be used if cs-gpios property is defined. >>> >>> Signed-off-by: Patrice Chotard <patrice.chotard@xxxxxxxxxxx> >>> --- >>> Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml | 8 ++++++++ >>> 1 file changed, 8 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml b/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml >>> index 6ec6f556182f..5e4f9109799e 100644 >>> --- a/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml >>> +++ b/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml >>> @@ -46,6 +46,14 @@ properties: >>> - const: tx >>> - const: rx >>> >>> + st,dual-flash: >>> + type: boolean >>> + description: >>> + Allows to use 8 data lines in case cs-gpios property is defined. >> >> It's named dual-flash, but what if you want to use QSPI to connect for >> example to FPGA? >> >> Also how is this related to parallel-memories property? > > I called it "dual-flash" simply because it enable the dual flash feature of the QSPI block (bit CR_DFM : Dual Flash Mode) > which allows to use the 8 lines simultaneously of our dual QSPI block. And how is it related to existing parallel-memories property? Best regards, Krzysztof
