Add binding documentation for the Amlogic G12 series DDR
performance monitor unit.
Signed-off-by: Jiucheng Xu <jiucheng.xu@xxxxxxxxxxx>
---
Changes v3 -> v4:
- Fix "$id: relative path/filename doesn't match actual path or
filename" warning
Changes v2 -> v3:
- Remove oneOf
- Add descriptions
- Fix compiling warning
Changes v1 -> v2:
- Rename file, from aml_ddr_pmu.yaml to amlogic,g12_ddr_pmu.yaml
- Delete "model", "dmc_nr", "chann_nr" new properties
- Fix compiling error
---
.../bindings/perf/amlogic,g12-ddr-pmu.yaml | 52 +++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 53 insertions(+)
create mode 100644 Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml
diff --git a/Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml b/Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml
new file mode 100644
index 000000000000..4d018574ffd1
--- /dev/null
+++ b/Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml
@@ -0,0 +1,52 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/perf/amlogic,g12-ddr-pmu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic G12 DDR performance monitor
+
+maintainers:
+ - Jiucheng Xu <jiucheng.xu@xxxxxxxxxxx>
+
+description: |
+ Amlogic G12 series SoC integrate DDR bandwidth monitor.
+ A timer is inside and can generate interrupt when timeout.
+ The bandwidth is counted in the timer ISR. Different platform
+ has different subset of event format attribute.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - amlogic,g12b-ddr-pmu
+ - amlogic,g12a-ddr-pmu
+ - amlogic,sm1-ddr-pmu
+
+ reg:
+ items:
+ - description: Physical address of DMC bandwidth register
+ and size of the configuration address space.
+ - description: Physical address of DMC PLL register and
+ size of the configuration address space.
+
+ interrupts:
+ items:
+ - description: The IRQ of the inside timer timeout.
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ ddr_pmu@ff638000 {
+ compatible = "amlogic,g12a-ddr-pmu";
+ reg = <0xff638000 0x100
+ 0xff638c00 0x100>;
+ interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 8ee68e699e6d..67c2c9e8c4ea 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1055,6 +1055,7 @@ M: Jiucheng Xu <jiucheng.xu@xxxxxxxxxxx>
S: Supported
W: http://www.amlogic.com
F: Documentation/admin-guide/perf/meson-ddr-pmu.rst
+F: Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml
F: drivers/perf/amlogic/
F: include/soc/amlogic/
--
2.25.1
