RV1126 is a high-performance vision processor SoC for IPC/CVR, especially for AI related application. It is based on quad-core ARM Cortex-A7 32-bit core which integrates NEON and FPU. There is a 32KB I-cache and 32KB D-cache for each core and 512KB unified L2 cache. It has build-in NPU supports INT8/INT16 hybrid operation and computing power is up to 2.0TOPs. This patch series add basic core support for Rockchip RV1126. Tested in Edgeble AI Edge Compute Module 0. Anyone interested, please have a look on this repo [1] [1] https://github.com/edgeble/linux-next/commits/ecm0-v4 Any inputs? Jagan. Elaine Zhang (1): clk: rockchip: Add MUXTBL variant Jagan Teki (20): dt-bindings: power: rockchip: Document RV1126 power-controller dt-bindings: power: Add power-domain header for RV1126 soc: rockchip: power-domain: Add RV1126 power domains dt-bindings: power: rockchip: Document RV1126 PMU IO domains dt-bindings: pinctrl: rockchip: Document RV1126 pinctrl pinctrl: rockchip: Add RV1126 pinctrl support dt-bindings: clock: rockchip: Document RV1126 CRU clk: rockchip: Add RV1126 clock controller dt-bindings: mmc: rockchip-dw-mshc: Document Rockchip RV1126 dt-bindings: serial: snps-dw-apb-uart: Document Rockchip RV1126 dt-bindings: i2c: i2c-rk3x: Document Rockchip RV1126 dt-bindings: soc: rockchip: Document RV1126 grf dt-bindings: soc: rockchip: Document RV1126 pmugrf dt-bindings: mfd: syscon: Add Rockchip RV1126 QoS register ARM: dts: rockchip: Add Rockchip RV1126 SoC dt-bindings: vendor-prefixes: Add Edgeble AI Technologies Pvt. Ltd. dt-bindings: arm: rockchip: Add Edgeble AI Edge Compute Module 0 Carrier ARM: dts: rockchip: rv1126: Add Edgeble AI Edge Compute Module 0 ARM: dts: rockchip: rv1126: Add Edgeble AI Edge Compute Module 0 Carrier ARM: configs: Add RV1126 ECM0 fragment config Jianqun Xu (1): soc: rockchip: io-domain: Add RV1126 IO domains .../devicetree/bindings/arm/rockchip.yaml | 6 + .../bindings/clock/rockchip,rv1126-cru.yaml | 70 ++ .../devicetree/bindings/i2c/i2c-rk3x.yaml | 1 + .../devicetree/bindings/mfd/syscon.yaml | 1 + .../bindings/mmc/rockchip-dw-mshc.yaml | 1 + .../bindings/pinctrl/rockchip,pinctrl.yaml | 1 + .../power/rockchip,power-controller.yaml | 2 + .../bindings/power/rockchip-io-domain.yaml | 30 + .../bindings/serial/snps-dw-apb-uart.yaml | 1 + .../devicetree/bindings/soc/rockchip/grf.yaml | 2 + .../devicetree/bindings/vendor-prefixes.yaml | 2 + MAINTAINERS | 2 +- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/rockchip-pinconf.dtsi | 115 ++ .../rv1126-edge-compute-module-0-carrier.dts | 38 + .../dts/rv1126-edge-compute-module-0.dtsi | 329 +++++ arch/arm/boot/dts/rv1126-pinctrl.dtsi | 302 +++++ arch/arm/boot/dts/rv1126.dtsi | 500 ++++++++ arch/arm/configs/rv1126-ecm0.config | 3 + drivers/clk/rockchip/Kconfig | 7 + drivers/clk/rockchip/Makefile | 1 + drivers/clk/rockchip/clk-rv1126.c | 1107 +++++++++++++++++ drivers/clk/rockchip/clk.c | 27 +- drivers/clk/rockchip/clk.h | 36 + drivers/pinctrl/pinctrl-rockchip.c | 333 ++++- drivers/pinctrl/pinctrl-rockchip.h | 1 + drivers/soc/rockchip/io-domain.c | 20 + drivers/soc/rockchip/pm_domains.c | 29 + include/dt-bindings/clock/rv1126-cru.h | 632 ++++++++++ include/dt-bindings/power/rv1126-power.h | 34 + 30 files changed, 3620 insertions(+), 14 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rv1126-cru.yaml create mode 100644 arch/arm/boot/dts/rockchip-pinconf.dtsi create mode 100644 arch/arm/boot/dts/rv1126-edge-compute-module-0-carrier.dts create mode 100644 arch/arm/boot/dts/rv1126-edge-compute-module-0.dtsi create mode 100644 arch/arm/boot/dts/rv1126-pinctrl.dtsi create mode 100644 arch/arm/boot/dts/rv1126.dtsi create mode 100644 arch/arm/configs/rv1126-ecm0.config create mode 100644 drivers/clk/rockchip/clk-rv1126.c create mode 100644 include/dt-bindings/clock/rv1126-cru.h create mode 100644 include/dt-bindings/power/rv1126-power.h -- 2.25.1
