On 15-07-22, 21:39, Manivannan Sadhasivam wrote: > The clocks defined in the devicetree currently (CXO, GPLL) are the source > clocks of the EPSS block (cpufreq-hw). And EPSS will supply clock and > voltage through other blocks to the CPU domains. Even though the end > consumer of the source clocks are the CPUs, those clocks are not > directly reachign the CPUs but instead through some other blocks in EPSS. Fair enough, o these clocks should be present in the cpufreq-hw node, as there were. > Initially I was temped to add cpufreq-hw as the clock provider and have > it source clocks to the individual CPUs. This somehow models the clock > topology also Right. > , but after having a discussion with Bjorn we concluded that > it is best to leave it as it is. > > The main issue that Bjorn pointed out was the fact that the clocks coming > out of EPSS are not exactly of the same frequency that was requested. > EPSS will do its own logic to generate the clocks to the CPUs based on > the input frequency vote and limits. The OPP tables, which are part of the CPU nodes, mentions clock rates. Are these values for the cxo/gpll clocks or the clock that reaches the CPUs? I believe the latter. The DT is not really complete if the CPU node mentions the frequency, but not the source clock. It works for you because you don't want to do clk_set_rate() in this case, but then it leaves other frameworks, like OPP, confused and rightly so. Normally, there is always a difference in what the OPP table contains as frequency value and what the hardware programs, mostly it is small though. It shouldn't prevent us from having the hierarchy clearly defined in the DT. Based on your description, I think it would be better to make cpufreq-hw a clock provider and CPUs the consumer of it. It would then allow the OPP core to not carry the hack to make it all work. -- viresh
