From: Thor Thayer <tthayer@xxxxxxxxxxxxxxxxxxxxx> This patch adds the L2 cache and OCRAM peripherals to the EDAC framework using the EDAC device framework. The ECC is enabled early in the boot process in the platform specific code. Thor Thayer (3): arm: socfpga: Enable ECC of L2 and OCRAM on startup. edac: altera: Add Altera L2 Cache and OCRAM EDAC Support arm: dts: Add Altera L2 Cache and OCRAM EDAC .../bindings/arm/altera/socfpga-l2-edac.txt | 15 ++ .../bindings/arm/altera/socfpga-ocram-edac.txt | 16 ++ MAINTAINERS | 7 + arch/arm/boot/dts/socfpga.dtsi | 20 +- arch/arm/configs/socfpga_defconfig | 1 + arch/arm/mach-socfpga/Makefile | 2 + arch/arm/mach-socfpga/l2_cache.c | 44 ++++ arch/arm/mach-socfpga/l2_cache.h | 28 +++ arch/arm/mach-socfpga/ocram.c | 84 +++++++ arch/arm/mach-socfpga/ocram.h | 28 +++ arch/arm/mach-socfpga/socfpga.c | 13 +- drivers/edac/Kconfig | 14 ++ drivers/edac/Makefile | 4 + drivers/edac/altera_edac_mgr.c | 261 ++++++++++++++++++++ drivers/edac/altera_edac_mgr.h | 56 +++++ drivers/edac/altera_l2_edac.c | 130 ++++++++++ drivers/edac/altera_ocram_edac.c | 107 ++++++++ 17 files changed, 828 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-l2-edac.txt create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-ocram-edac.txt create mode 100644 arch/arm/mach-socfpga/l2_cache.c create mode 100644 arch/arm/mach-socfpga/l2_cache.h create mode 100644 arch/arm/mach-socfpga/ocram.c create mode 100644 arch/arm/mach-socfpga/ocram.h create mode 100644 drivers/edac/altera_edac_mgr.c create mode 100644 drivers/edac/altera_edac_mgr.h create mode 100644 drivers/edac/altera_l2_edac.c create mode 100644 drivers/edac/altera_ocram_edac.c -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
