Add audio related nodes for mt8195.
Signed-off-by: Trevor Wu <trevor.wu@xxxxxxxxxxxx>
Signed-off-by: Tinghan Shen <tinghan.shen@xxxxxxxxxxxx>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 58 ++++++++++++++++++++++++
1 file changed, 58 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index e5e7421dd5c5..818f7dea27c6 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -226,6 +226,17 @@
<&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
};
+ dmic_codec: dmic-codec {
+ compatible = "dmic-codec";
+ num-channels = <2>;
+ wakeup-delay-ms = <50>;
+ };
+
+ sound: mt8195-sound {
+ mediatek,platform = <&afe>;
+ status = "disabled";
+ };
+
clk26m: oscillator-26m {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -728,6 +739,53 @@
#clock-cells = <1>;
};
+ afe: mt8195-afe-pcm@10890000 {
+ compatible = "mediatek,mt8195-audio";
+ reg = <0 0x10890000 0 0x10000>;
+ mediatek,topckgen = <&topckgen>;
+ power-domains = <&spm MT8195_POWER_DOMAIN_AUDIO>;
+ interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&clk26m>,
+ <&apmixedsys CLK_APMIXED_APLL1>,
+ <&apmixedsys CLK_APMIXED_APLL2>,
+ <&topckgen CLK_TOP_APLL12_DIV0>,
+ <&topckgen CLK_TOP_APLL12_DIV1>,
+ <&topckgen CLK_TOP_APLL12_DIV2>,
+ <&topckgen CLK_TOP_APLL12_DIV3>,
+ <&topckgen CLK_TOP_APLL12_DIV9>,
+ <&topckgen CLK_TOP_A1SYS_HP>,
+ <&topckgen CLK_TOP_AUD_INTBUS>,
+ <&topckgen CLK_TOP_AUDIO_H>,
+ <&topckgen CLK_TOP_AUDIO_LOCAL_BUS>,
+ <&topckgen CLK_TOP_DPTX_MCK>,
+ <&topckgen CLK_TOP_I2SO1_MCK>,
+ <&topckgen CLK_TOP_I2SO2_MCK>,
+ <&topckgen CLK_TOP_I2SI1_MCK>,
+ <&topckgen CLK_TOP_I2SI2_MCK>,
+ <&infracfg_ao CLK_INFRA_AO_AUDIO_26M_B>,
+ <&scp_adsp CLK_SCP_ADSP_AUDIODSP>;
+ clock-names = "clk26m",
+ "apll1_ck",
+ "apll2_ck",
+ "apll12_div0",
+ "apll12_div1",
+ "apll12_div2",
+ "apll12_div3",
+ "apll12_div9",
+ "a1sys_hp_sel",
+ "aud_intbus_sel",
+ "audio_h_sel",
+ "audio_local_bus_sel",
+ "dptx_m_sel",
+ "i2so1_m_sel",
+ "i2so2_m_sel",
+ "i2si1_m_sel",
+ "i2si2_m_sel",
+ "infra_ao_audio_26m_b",
+ "scp_adsp_audiodsp";
+ status = "disabled";
+ };
+
uart0: serial@11001100 {
compatible = "mediatek,mt8195-uart",
"mediatek,mt6577-uart";
--
2.18.0
