This adds bindings for the PCS half of the Lynx 10g/28g SerDes drivers. Signed-off-by: Sean Anderson <sean.anderson@xxxxxxxx> --- .../devicetree/bindings/net/fsl,lynx-pcs.yaml | 47 +++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/fsl,lynx-pcs.yaml diff --git a/Documentation/devicetree/bindings/net/fsl,lynx-pcs.yaml b/Documentation/devicetree/bindings/net/fsl,lynx-pcs.yaml new file mode 100644 index 000000000000..49dee66ab679 --- /dev/null +++ b/Documentation/devicetree/bindings/net/fsl,lynx-pcs.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/fsl,lynx-pcs.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP Lynx 10g/28g PCS + +maintainers: + - Ioana Ciornei <ioana.ciornei@xxxxxxx> + +description: | + Lynx SerDes devices may contain several Ethernet protocol controllers. These + controllers convert between (X)GMII and a variety of high-speed interfaces + (SGMII, 10GBase-R, QSGMII, etc). Unlike the SerDes itself, the PCSs are + accessed over an internal MDIO bus. + +properties: + compatible: + const: fsl,lynx-pcs + + reg: + maxItems: 1 + + phys: + description: A reference to the SerDes lane(s) + maxItems: 1 + + phy-names: + const: serdes + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + ethernet-pcs@1 { + compatible = "fsl,lynx-pcs"; + reg = <0x1>; + }; + }; -- 2.35.1.1320.gc452695387.dirty
