On Mon, Jul 11, 2022 at 02:00:38PM +0530, Sumit Garg wrote:
> Currently the DT for QCS404 SoC has setup for 2 USB2 PHYs with one each
> assigned to USB3 controller and USB2 controller. This assignment is
> incorrect which only works by luck: as when each USB HCI comes up it
> configures the *other* controllers PHY which is enough to make them
> happy. If, for any reason, we were to disable one of the controllers then
> both would stop working.
>
> This was a difficult inconsistency to be caught which was found while
> trying to enable USB support in u-boot. So with all the required drivers
> ported to u-boot, I couldn't get the same USB storage device enumerated
> in u-boot which was being enumerated fine by the kernel.
>
> The root cause of the problem came out to be that I wasn't enabling USB2
> PHY: "usb2_phy_prim" in u-boot. Then I realised that via simply disabling
> the same USB2 PHY currently assigned to USB2 host controller in the
> kernel disabled enumeration for USB3 host controller as well.
>
> So fix this inconsistency by correctly assigning USB2 PHYs.
>
> Fixes: 9375e7d719b3 ("arm64: dts: qcom: qcs404: Add USB devices and PHYs")
> Signed-off-by: Sumit Garg <sumit.garg@xxxxxxxxxx>
I've not got one of these board (nor any documentation for them) but the
description and change look OK. Thus FWIW:
Reviewed-by: Daniel Thompson <daniel.thompson@xxxxxxxxxx>
Daniel.
> ---
>
> Changes in v2:
> - Update commit message description.
>
> arch/arm64/boot/dts/qcom/qcs404.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
> index 513bf7343b2c..50edc11a5bb5 100644
> --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
> @@ -557,7 +557,7 @@ usb3_dwc3: usb@7580000 {
> compatible = "snps,dwc3";
> reg = <0x07580000 0xcd00>;
> interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> - phys = <&usb2_phy_sec>, <&usb3_phy>;
> + phys = <&usb2_phy_prim>, <&usb3_phy>;
> phy-names = "usb2-phy", "usb3-phy";
> snps,has-lpm-erratum;
> snps,hird-threshold = /bits/ 8 <0x10>;
> @@ -586,7 +586,7 @@ usb@78c0000 {
> compatible = "snps,dwc3";
> reg = <0x078c0000 0xcc00>;
> interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
> - phys = <&usb2_phy_prim>;
> + phys = <&usb2_phy_sec>;
> phy-names = "usb2-phy";
> snps,has-lpm-erratum;
> snps,hird-threshold = /bits/ 8 <0x10>;
> --
> 2.25.1
>
