Follow the usual scheme and use name 'iface' rather than 'iface_clk' for
the interface clock. The DSI PHY driver can cope with both of them, so
there is no breakage.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 91adcbd54b17..4b264cf7eccc 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -1299,7 +1299,7 @@ dsi0_phy: dsi-phy@4700200 {
<0x04700300 0x200>,
<0x04700500 0x5c>;
reg-names = "dsi_pll", "dsi_phy", "dsi_phy_regulator";
- clock-names = "iface_clk", "ref";
+ clock-names = "iface", "ref";
clocks = <&mmcc DSI_M_AHB_CLK>,
<&pxo_board>;
};
--
2.35.1
