[PATCH v2 4/6] clk: qcom: gcc-msm8909: Increase delay for USB PHY reset

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The USB PHY on MSM8909 works with the driver used on MSM8916
(phy-qcom-usb-hs.c). When turning the PHY on/off it is first reset
using the standard reset controller API. On MSM8916 the reset is
provided by the USB driver (ci_hdrc_msm_por_reset() in ci_hdrc_msm.c).

While this seems to work on MSM8909 as well, the Qualcomm Linux sources
suggest that the PHY should be reset using the GCC_USB2_HS_PHY_ONLY_BCR
register instead. In general this is easy to set up in the device tree,
thanks to the standard reset controller API.

However, to conform to the specifications of the PHY the reset signal
should be asserted for at least 10 us. This is handled correctly on
MSM8916 in ci_hdrc_msm_por_reset(), but not within the GCC driver.

Fix this by making use of the new "udelay" field of qcom_reset_map
and set a delay of ~15 us between the assertion/deassertion of the
USB PHY reset signal.

Signed-off-by: Stephan Gerhold <stephan.gerhold@xxxxxxxxxxxxxxx>
---
Changes in v2: None.
---
 drivers/clk/qcom/gcc-msm8909.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/qcom/gcc-msm8909.c b/drivers/clk/qcom/gcc-msm8909.c
index c551953d3791..2a00b11ce2cd 100644
--- a/drivers/clk/qcom/gcc-msm8909.c
+++ b/drivers/clk/qcom/gcc-msm8909.c
@@ -2670,7 +2670,7 @@ static const struct qcom_reset_map gcc_msm8909_resets[] = {
 	[GCC_SDCC2_BCR] = { 0x43000 },
 	[GCC_ULT_AUDIO_BCR] = { 0x1c0b4 },
 	[GCC_USB2A_PHY_BCR] = { 0x41028 },
-	[GCC_USB2_HS_PHY_ONLY_BCR] = { 0x41034 },
+	[GCC_USB2_HS_PHY_ONLY_BCR] = { .reg = 0x41034, .udelay = 15 },
 	[GCC_USB_HS_BCR] = { 0x41000 },
 	[GCC_VENUS0_BCR] = { 0x4c014 },
 	/* Subsystem Restart */
-- 
2.30.2




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