This series adds support for the Marvell 98DX2530 SoC which is the Control and
Management CPU integrated into the AlleyCat5/AlleyCat5X series of Marvell
switches.
The CPU core is an ARM Cortex-A55 with neon, simd and crypto extensions.
This is fairly similar to the Armada-3700 SoC so most of the required
peripherals are already supported. This series adds a devicetree and pinctrl
driver for the SoC and the RD-AC5X-32G16HVG6HLG reference board.
The pinctrl changes from v4 have been picked up and are in linux-next so I
haven't included them in this round. That leaves just the dts files and a minor
Kconfig update for arm64.
Changes:
v10:
1) Use different cnm clock for AC5 and AC5X DTSIs
2) Rename device-tree yaml binding to match the $id
v9 (proposed by Marvell):
It was discussed with Chris that Marvell will add some changes:
1) Rename "armada-" prefix in dts(i) file names to ac5, because
Armada has not much common with AC5 SoC.
2) Add clock fixes:
a) rename core_clock to cnm_clock
b) remove axi_clock
c) change cnm_clock to 325MHZ
d) use cnm_clock for the UART
Chris Packham (3):
dt-bindings: marvell: Document the AC5/AC5X compatibles
arm64: dts: marvell: Add Armada 98DX2530 SoC and RD-AC5X board
arm64: marvell: enable the 98DX2530 pinctrl driver
.../bindings/arm/marvell/marvell,ac5.yaml | 32 ++
arch/arm64/Kconfig.platforms | 2 +
arch/arm64/boot/dts/marvell/Makefile | 1 +
arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi | 291 ++++++++++++++++++
.../boot/dts/marvell/ac5-98dx35xx-rd.dts | 101 ++++++
arch/arm64/boot/dts/marvell/ac5-98dx35xx.dtsi | 17 +
6 files changed, 444 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,ac5.yaml
create mode 100644 arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi
create mode 100644 arch/arm64/boot/dts/marvell/ac5-98dx35xx-rd.dts
create mode 100644 arch/arm64/boot/dts/marvell/ac5-98dx35xx.dtsi
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2.17.1
