From: Han Xu <han.xu@xxxxxxx>
To enable the octal ddr for iMX8QM/QXP/DXL, need to set the proper
slave line delay to get the correct sample points. So add one entry
in dts to set it.
Signed-off-by: Han Xu <han.xu@xxxxxxx>
Signed-off-by: Haibo Chen <haibo.chen@xxxxxxx>
---
drivers/spi/spi-nxp-fspi.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c
index 61cf1b82c0d7..cfc2600e3b6d 100644
--- a/drivers/spi/spi-nxp-fspi.c
+++ b/drivers/spi/spi-nxp-fspi.c
@@ -218,9 +218,13 @@
#define FSPI_DLLACR 0xC0
#define FSPI_DLLACR_OVRDEN BIT(8)
+#define FSPI_DLLACR_SLVDLY(x) ((x) << 3)
+#define FSPI_DLLACR_DLLEN BIT(0)
#define FSPI_DLLBCR 0xC4
#define FSPI_DLLBCR_OVRDEN BIT(8)
+#define FSPI_DLLBCR_SLVDLY(x) ((x) << 3)
+#define FSPI_DLLBCR_DLLEN BIT(0)
#define FSPI_STS0 0xE0
#define FSPI_STS0_DLPHB(x) ((x) << 8)
@@ -375,6 +379,7 @@ struct nxp_fspi {
u32 memmap_phy_size;
u32 memmap_start;
u32 memmap_len;
+ u32 dll_slvdly;
struct clk *clk, *clk_en;
struct device *dev;
struct completion c;
@@ -1081,6 +1086,13 @@ static int nxp_fspi_default_setup(struct nxp_fspi *f)
fspi_writel(f, FSPI_DLLACR_OVRDEN, base + FSPI_DLLACR);
fspi_writel(f, FSPI_DLLBCR_OVRDEN, base + FSPI_DLLBCR);
+ if (f->dll_slvdly) {
+ fspi_writel(f, FSPI_DLLACR_DLLEN | FSPI_DLLACR_SLVDLY(f->dll_slvdly),
+ base + FSPI_DLLACR);
+ fspi_writel(f, FSPI_DLLBCR_DLLEN | FSPI_DLLBCR_SLVDLY(f->dll_slvdly),
+ base + FSPI_DLLBCR);
+ }
+
/* enable module */
fspi_writel(f, FSPI_MCR0_AHB_TIMEOUT(0xFF) |
FSPI_MCR0_IP_TIMEOUT(0xFF) | (u32) FSPI_MCR0_OCTCOMB_EN,
@@ -1259,6 +1271,9 @@ static int nxp_fspi_probe(struct platform_device *pdev)
goto err_disable_clk;
}
+ /* check if need to set the slave delay line */
+ of_property_read_u32(np, "nxp,fspi-dll-slvdly", &f->dll_slvdly);
+
mutex_init(&f->lock);
ctlr->bus_num = -1;
--
2.25.1
