Hi Qianfan,
On 5/18/22 5:17 AM, qianfanguijin@xxxxxxx wrote:
> From: qianfan Zhao <qianfanguijin@xxxxxxx>
>
> The USB0 port of R40 is divided into two controllers, one is H3
> compatibled MUSB device, another is OHCI/EHCI.
typo: compatible
>
> Signed-off-by: qianfan Zhao <qianfanguijin@xxxxxxx>
> ---
> arch/arm/boot/dts/sun8i-r40.dtsi | 34 ++++++++++++++++++++++++++++++++
> 1 file changed, 34 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
> index 212e19183484..ae48474fdefa 100644
> --- a/arch/arm/boot/dts/sun8i-r40.dtsi
> +++ b/arch/arm/boot/dts/sun8i-r40.dtsi
> @@ -401,6 +401,21 @@ mmc3: mmc@1c12000 {
> #size-cells = <0>;
> };
>
> + usb_otg: usb@1c13000 {
> + compatible = "allwinner,sun8i-r40-musb",
This compatible string needs to be documented in the binding[0] before you can
use it.
[0]: Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml
> + "allwinner,sun8i-h3-musb";
> + reg = <0x01c13000 0x0400>;
> + clocks = <&ccu CLK_BUS_OTG>;
> + resets = <&ccu RST_BUS_OTG>;
> + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "mc";
> + phys = <&usbphy 0>;
> + phy-names = "usb";
> + extcon = <&usbphy 0>;
> + dr_mode = "otg";
> + status = "disabled";
> + };
> +
> usbphy: phy@1c13400 {
> compatible = "allwinner,sun8i-r40-usb-phy";
> reg = <0x01c13400 0x14>,
> @@ -427,6 +442,25 @@ usbphy: phy@1c13400 {
> #phy-cells = <1>;
> };
>
> + ehci0: usb@1c14000 {
> + compatible = "allwinner,sun8i-r40-ehci", "generic-ehci";
> + reg = <0x01c14000 0x100>;
> + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>;
> + resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
> + status = "disabled";
> + };
> +
> + ohci0: usb@1c14400 {
> + compatible = "allwinner,sun8i-r40-ohci", "generic-ohci";
> + reg = <0x01c14400 0x100>;
> + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>,
> + <&ccu CLK_USB_OHCI0>;
> + resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
Are you sure the OHCI device requires the EHCI clocks/resets? Usually it is only
the other way around.
Regards,
Samuel
> + status = "disabled";
> + };
> +
> crypto: crypto@1c15000 {
> compatible = "allwinner,sun8i-r40-crypto";
> reg = <0x01c15000 0x1000>;
>
