All devices of the Cherry platform have a MT6360 sub-pmic,
providing two LDOs. Add the required node to enable the PMIC
but without regulators yet, as these will be added in a
later commit.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@xxxxxxxxxxxxx>
---
.../boot/dts/mediatek/mt8195-cherry.dtsi | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
index f68d8ff05b4d..c07d3ac79f62 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
@@ -161,6 +161,18 @@ &i2c7 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c7_pins>;
+
+ pmic@34 {
+ #interrupt-cells = <1>;
+ compatible = "mediatek,mt6360";
+ reg = <0x34>;
+ interrupt-controller;
+ interrupts-extended = <&pio 130 IRQ_TYPE_EDGE_FALLING>;
+ interrupt-names = "IRQB";
+ pinctrl-names = "default";
+ pinctrl-0 = <&subpmic_default>;
+ wakeup-source;
+ };
};
&mmc0 {
@@ -558,6 +570,14 @@ pins-miso {
bias-pull-down;
};
};
+
+ subpmic_default: subpmic-default-pins {
+ subpmic_pin_irq: pins-subpmic-int-n {
+ pinmux = <PINMUX_GPIO130__FUNC_GPIO130>;
+ input-enable;
+ bias-pull-up;
+ };
+ };
};
&pmic {
--
2.35.1
