Il 01/07/22 14:12, Allen-KH Cheng ha scritto:
This patch is for enableing cache in SCP. There is not enough space on the SRAM of SCP. We need to run programs in DRAM. The DRAM power and latency is much larger than SRAM, so cache is used to mitigate the negative effects for performance. we set SCP registers for cache size before loading SCP FW. (8KB+8KB) and also adjust ipi_buf_offset in SRAM from 0x7bdb0 to 0x3BDB0 for enableing cache. This patch was tested on MediaTek mt8186. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@xxxxxxxxxxxx>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>
