Add the fec support on i.MX8ULP platforms.
Signed-off-by: Wei Fang <wei.fang@xxxxxxx>
---
arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 29 ++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index 60c1b018bf03..822f3aea46e1 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -16,6 +16,7 @@ / {
#size-cells = <2>;
aliases {
+ ethernet0 = &fec;
gpio0 = &gpiod;
gpio1 = &gpioe;
gpio2 = &gpiof;
@@ -137,6 +138,19 @@ scmi_sensor: protocol@15 {
};
};
+ clock_ext_rmii: clock-ext-rmii {
+ compatible = "fixed-clock";
+ clock-frequency = <50000000>;
+ #clock-cells = <0>;
+ clock-output-names = "ext_rmii_clk";
+ };
+
+ clock_ext_ts: clock-ext-ts {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-output-names = "ext_ts_clk";
+ };
+
soc: soc@0 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -365,6 +379,21 @@ usdhc2: mmc@298f0000 {
bus-width = <4>;
status = "disabled";
};
+
+ fec: ethernet@29950000 {
+ compatible = "fsl,imx8ulp-fec", "fsl,imx6ul-fec";
+ reg = <0x29950000 0x10000>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "int0";
+ clocks = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>,
+ <&pcc4 IMX8ULP_CLK_ENET>,
+ <&cgc1 IMX8ULP_CLK_ENET_TS_SEL>,
+ <&clock_ext_rmii>;
+ clock-names = "ipg", "ahb", "ptp", "enet_clk_ref";
+ fsl,num-tx-queues = <1>;
+ fsl,num-rx-queues = <1>;
+ status = "disabled";
+ };
};
gpioe: gpio@2d000080 {
--
2.25.1
