Dne nedelja, 26. junij 2022 ob 04:11:45 CEST je Samuel Holland napisal(a): > Starting with the D1/D1s/T113 SoC, Allwinner changed the layout of the > pinctrl registers. This new layout widens the drive level field, which > affects the pull register offset and the overall bank size. > > As a first step to support this, combine the register and offset > calculation functions, and refactor the math to depend on one constant > for field widths instead of three. This minimizes the code size impact > of making some of the factors dynamic. > > While rewriting these functions, move them to the implementation file, > since that is the only file where they are used. And make the comment > more generic, without mentioning specific offsets/sizes. > > The callers are updated to expect a shifted mask, and to use consistent > terminology (reg/shift/mask/val). > > Signed-off-by: Samuel Holland <samuel@xxxxxxxxxxxx> Nice cleanup. Reviewed-by: Jernej Skrabec <jernej.skrabec@xxxxxxxxx> Best regards, Jernej
