On Thu, Jun 30, 2022 at 05:33:13PM +0200, AngeloGioacchino Del Regno wrote: > Add USB functionality by enabling the required PHYs and the XHCI > controllers. > This enables all of the supported USB ports on the Cherry boards. > > Please note that u3phy1 also enables u3port1, which is configured > to be a PCI-Express PHY for the second PCIe controller that is > found on the MT8195 SoC, which will be enabled in a later commit. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@xxxxxxxxxxxxx> Thanks, Nícolas
