On Wed 29 Jun 13:42 CDT 2022, Stephan Gerhold wrote:
> On Tue, Jun 28, 2022 at 09:14:36PM -0700, Bjorn Andersson wrote:
> > Introduce initial support for the Qualcomm SC8280XP platform, aka 8cx
> > Gen 3. This initial contribution supports SMP, CPUfreq, CPU cluster
> > idling, GCC, TLMM, SMMU, RPMh regulators, power-domains and clocks,
> > interconnects, some QUPs, UFS, remoteprocs, USB, watchdog, LLCC and
> > tsens.
> >
> > Signed-off-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
> > Reviewed-by: Johan Hovold <johan+linaro@xxxxxxxxxx>
> > Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxx>
> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
> > ---
> >
> > Changes since v2:
> > - Fixed include sort order
> > - Dropped a stray newline in &CPU0
> > - Renamed reserved-memory regions
> > - Dropped clock-frequency of the timers node
> > - Reduced #address-cells and #size-cells to 1 in timer node
> >
> > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2142 ++++++++++++++++++++++++
> > 1 file changed, 2142 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> > new file mode 100644
> > index 000000000000..c9d608ac87fa
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> > @@ -0,0 +1,2142 @@
> [...]
> > + timer {
> > + compatible = "arm,armv8-timer";
> > + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
> > + clock-frequency = <19200000>;
>
> Please drop the "clock-frequency" here as well (if possible).
>
Sorry, missed that commend from your previous feedback. Will drop this
as I'm applying the patches.
Thanks,
Bjorn
