On 27/06/2022 10:56, AngeloGioacchino Del Regno wrote: > Add the bindings for the clock drivers of the MediaTek Helio X10 > MT6795 SoC. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx> > --- > .../bindings/clock/mediatek,mt6795-clock.yaml | 66 +++++++++++++++++++ > .../clock/mediatek,mt6795-sys-clock.yaml | 54 +++++++++++++++ > 2 files changed, 120 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt6795-clock.yaml > create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml > > diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt6795-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt6795-clock.yaml > new file mode 100644 > index 000000000000..795fb18721c3 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/mediatek,mt6795-clock.yaml > @@ -0,0 +1,66 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/clock/mediatek,mt6795-clock.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" No quotes in both places. Especially that once you use " and in other place here '. > + > +title: MediaTek Functional Clock Controller for MT6795 > + > +maintainers: > + - AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx> > + - Chun-Jie Chen <chun-jie.chen@xxxxxxxxxxxx> > + > +description: | > + The clock architecture in MediaTek like below > + PLLs --> > + dividers --> > + muxes > + --> > + clock gate > + > + The devices provide clock gate control in different IP blocks. > + > +properties: > + compatible: > + enum: > + - mediatek,mt6795-mfgcfg > + - mediatek,mt6795-vdecsys > + - mediatek,mt6795-vencsys > + > + reg: > + maxItems: 1 > + > + '#clock-cells': > + const: 1 > + > +required: > + - compatible > + - reg > + - '#clock-cells' > + > +additionalProperties: false > + > +examples: > + - | > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + mfgcfg: clock-controller@13000000 { > + compatible = "mediatek,mt6795-mfgcfg"; > + reg = <0 0x13000000 0 0x1000>; > + #clock-cells = <1>; > + }; > + > + vdecsys: clock-controller@16000000 { > + compatible = "mediatek,mt6795-vdecsys"; > + reg = <0 0x16000000 0 0x1000>; > + #clock-cells = <1>; > + }; > + > + vencsys: clock-controller@18000000 { > + compatible = "mediatek,mt6795-vencsys"; > + reg = <0 0x18000000 0 0x1000>; > + #clock-cells = <1>; > + }; > + }; > diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml > new file mode 100644 > index 000000000000..629e0cc7c916 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml > @@ -0,0 +1,54 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/clock/mediatek,mt6795-sys-clock.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" No quotes. Best regards, Krzysztof