This adds bindings for the SerDes devices. They are disabled by default
to prevent any breakage on existing boards.
Signed-off-by: Sean Anderson <sean.anderson@xxxxxxxx>
---
Changes in v2:
- Disable SerDes by default to prevent breaking boards inadvertently.
- Use one phy cell for SerDes1, since no lanes can be grouped
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 0085e83adf65..8b15653607c9 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -413,6 +413,22 @@ bportals: bman-portals@508000000 {
ranges = <0x0 0x5 0x08000000 0x8000000>;
};
+ serdes1: phy@1ea0000 {
+ #clock-cells = <1>;
+ #phy-cells = <1>;
+ compatible = "fsl,ls1046a-serdes-1";
+ reg = <0x0 0x1ea0000 0x0 0x2000>;
+ status = "disabled";
+ };
+
+ serdes2: phy@1eb0000 {
+ #clock-cells = <1>;
+ #phy-cells = <2>;
+ compatible = "fsl,ls1046a-serdes-2";
+ reg = <0x0 0x1eb0000 0x0 0x2000>;
+ status = "disabled";
+ };
+
dcfg: dcfg@1ee0000 {
compatible = "fsl,ls1046a-dcfg", "syscon";
reg = <0x0 0x1ee0000 0x0 0x1000>;
--
2.35.1.1320.gc452695387.dirty
