On 2022-06-20 00:27:33, Dmitry Baryshkov wrote:
> The gcc_mss_q6_bimc_axi_clk clock depends on the bimc_ddr_clk_src clock.
> Move it down in the file to come after the source clock.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
Reviewed-by: Marijn Suijten <marijn.suijten@xxxxxxxxxxxxxx>
> ---
> drivers/clk/qcom/gcc-msm8916.c | 34 +++++++++++++++++-----------------
> 1 file changed, 17 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/clk/qcom/gcc-msm8916.c b/drivers/clk/qcom/gcc-msm8916.c
> index 7962edbdbcf6..4d726ca4b0da 100644
> --- a/drivers/clk/qcom/gcc-msm8916.c
> +++ b/drivers/clk/qcom/gcc-msm8916.c
> @@ -2594,23 +2594,6 @@ static struct clk_branch gcc_mss_cfg_ahb_clk = {
> },
> };
>
> -static struct clk_branch gcc_mss_q6_bimc_axi_clk = {
> - .halt_reg = 0x49004,
> - .clkr = {
> - .enable_reg = 0x49004,
> - .enable_mask = BIT(0),
> - .hw.init = &(struct clk_init_data){
> - .name = "gcc_mss_q6_bimc_axi_clk",
> - .parent_names = (const char *[]){
> - "bimc_ddr_clk_src",
> - },
> - .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_branch2_ops,
> - },
> - },
> -};
> -
> static struct clk_branch gcc_oxili_ahb_clk = {
> .halt_reg = 0x59028,
> .clkr = {
> @@ -2860,6 +2843,23 @@ static struct clk_branch gcc_bimc_gpu_clk = {
> },
> };
>
> +static struct clk_branch gcc_mss_q6_bimc_axi_clk = {
How'd you settle on placing it here? It isn't right below
bimc_ddr_clk_src, nor the last user of bimc_ddr_clk_src, doesn't seem to
have any alphabetical or .enable_reg related ordering to the other clks
either?
> + .halt_reg = 0x49004,
> + .clkr = {
> + .enable_reg = 0x49004,
> + .enable_mask = BIT(0),
> + .hw.init = &(struct clk_init_data){
> + .name = "gcc_mss_q6_bimc_axi_clk",
> + .parent_names = (const char *[]){
> + "bimc_ddr_clk_src",
> + },
> + .num_parents = 1,
> + .flags = CLK_SET_RATE_PARENT,
> + .ops = &clk_branch2_ops,
> + },
> + },
> +};
> +
> static struct clk_branch gcc_jpeg_tbu_clk = {
> .halt_reg = 0x12034,
> .clkr = {
> --
> 2.35.1
>
