On 20/06/2022 22:54, Rahul T R wrote:
> Convert cdns,dsi.txt binding to yaml format
>
> Signed-off-by: Rahul T R <r-ravikumar@xxxxxx>
> ---
> .../bindings/display/bridge/cdns,dsi.txt | 112 ----------
> .../bindings/display/bridge/cdns,dsi.yaml | 193 ++++++++++++++++++
> 2 files changed, 193 insertions(+), 112 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/display/bridge/cdns,dsi.txt
> create mode 100644 Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,dsi.txt b/Documentation/devicetree/bindings/display/bridge/cdns,dsi.txt
> deleted file mode 100644
> index 525a4bfd8634..000000000000
> --- a/Documentation/devicetree/bindings/display/bridge/cdns,dsi.txt
> +++ /dev/null
> @@ -1,112 +0,0 @@
> -Cadence DSI bridge
> -==================
> -
> -The Cadence DSI bridge is a DPI to DSI bridge supporting up to 4 DSI lanes.
> -
> -Required properties:
> -- compatible: should be set to "cdns,dsi".
> -- reg: physical base address and length of the controller's registers.
> -- interrupts: interrupt line connected to the DSI bridge.
> -- clocks: DSI bridge clocks.
> -- clock-names: must contain "dsi_p_clk" and "dsi_sys_clk".
> -- phys: phandle link to the MIPI D-PHY controller.
> -- phy-names: must contain "dphy".
> -- #address-cells: must be set to 1.
> -- #size-cells: must be set to 0.
> -
> -Optional properties:
> -- resets: DSI reset lines.
> -- reset-names: can contain "dsi_p_rst".
> -
> -Required subnodes:
> -- ports: Ports as described in Documentation/devicetree/bindings/graph.txt.
> - 2 ports are available:
> - * port 0: this port is only needed if some of your DSI devices are
> - controlled through an external bus like I2C or SPI. Can have at
> - most 4 endpoints. The endpoint number is directly encoding the
> - DSI virtual channel used by this device.
> - * port 1: represents the DPI input.
> - Other ports will be added later to support the new kind of inputs.
> -
> -- one subnode per DSI device connected on the DSI bus. Each DSI device should
> - contain a reg property encoding its virtual channel.
> -
> -Example:
> - dsi0: dsi@fd0c0000 {
> - compatible = "cdns,dsi";
> - reg = <0x0 0xfd0c0000 0x0 0x1000>;
> - clocks = <&pclk>, <&sysclk>;
> - clock-names = "dsi_p_clk", "dsi_sys_clk";
> - interrupts = <1>;
> - phys = <&dphy0>;
> - phy-names = "dphy";
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@1 {
> - reg = <1>;
> - dsi0_dpi_input: endpoint {
> - remote-endpoint = <&xxx_dpi_output>;
> - };
> - };
> - };
> -
> - panel: dsi-dev@0 {
> - compatible = "<vendor,panel>";
> - reg = <0>;
> - };
> - };
> -
> -or
> -
> - dsi0: dsi@fd0c0000 {
> - compatible = "cdns,dsi";
> - reg = <0x0 0xfd0c0000 0x0 0x1000>;
> - clocks = <&pclk>, <&sysclk>;
> - clock-names = "dsi_p_clk", "dsi_sys_clk";
> - interrupts = <1>;
> - phys = <&dphy1>;
> - phy-names = "dphy";
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - dsi0_output: endpoint@0 {
> - reg = <0>;
> - remote-endpoint = <&dsi_panel_input>;
> - };
> - };
> -
> - port@1 {
> - reg = <1>;
> - dsi0_dpi_input: endpoint {
> - remote-endpoint = <&xxx_dpi_output>;
> - };
> - };
> - };
> - };
> -
> - i2c@xxx {
> - panel: panel@59 {
> - compatible = "<vendor,panel>";
> - reg = <0x59>;
> -
> - port {
> - dsi_panel_input: endpoint {
> - remote-endpoint = <&dsi0_output>;
> - };
> - };
> - };
> - };
> diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml
> new file mode 100644
> index 000000000000..3da47c01dca8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml
> @@ -0,0 +1,193 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/bridge/cdns,dsi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Cadence DSI bridge
> +
> +maintainers:
> + - Boris Brezillon <boris.brezillon@xxxxxxxxxxx>
> +
> +description: |
> + CDNS DSI is a bridge device which converts DPI to DSI
> +
> +properties:
> + compatible:
> + enum:
> + - cdns,dsi
> + - ti,j721e-dsi
It wasn't here before, so this is not a conversion. Split adding new
compatibles and features from actual conversion.
> +
> + reg:
> + minItems: 1
> + items:
> + - description:
> + Register block for controller's registers.
> + - description:
> + Register block for wrapper settings registers in case of TI J7 SoCs.
This needs allOf with if:then:else constraining number of items per variant.
> +
> + clocks:
> + items:
> + - description: PSM clock, used by the IP
> + - description: sys clock, used by the IP
> +
> + clock-names:
> + items:
> + - const: dsi_p_clk
> + - const: dsi_sys_clk
> +
> + phys:
> + minItems: 1
instead maxItems: 1
> + description: phandle link to the MIPI D-PHY controller.
> +
> + phy-names:
> + const: dphy
> +
> + power-domains:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + resets:
> + minItems: 1
instead maxItems: 1
> + description: PHY reset.
> +
> + reset-names:
> + const: dsi_p_rst
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
additionalProperties: false
> +
> + properties:
> + port@0:
> + $ref: /schemas/graph.yaml#/properties/port
> + description:
> + Output port representing the DSI output. It can have
> + most 4 endpoints. The endpoint number is directly encoding
> + the DSI virtual channel used by this device.
> +
> + port@1:
> + $ref: /schemas/graph.yaml#/properties/port
> + description:
> + Input port representing the DP bridge input.
> +
> + required:
> + - port@1
> +
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> + - phys
> + - phy-names
> + - ports
> +
> +allOf:
> + - $ref: ../dsi-controller.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + dsi@fd0c0000 {
> + compatible = "cdns,dsi";
> + reg = <0x0 0xfd0c0000 0x0 0x1000>;
> + clocks = <&pclk>, <&sysclk>;
> + clock-names = "dsi_p_clk", "dsi_sys_clk";
> + interrupts = <1>;
> + phys = <&dphy0>;
> + phy-names = "dphy";
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@1 {
> + reg = <1>;
> + endpoint {
> + remote-endpoint = <&xxx_dpi_output>;
> + };
> + };
> + };
> +
> + panel@0 {
> + compatible = "panasonic,vvx10f034n00";
> + reg = <0>;
> + power-supply = <&vcc_lcd_reg>;
> + };
> + };
> +
> + - |
> + dsi@fd0c0000 {
> + compatible = "cdns,dsi";
> + reg = <0x0 0xfd0c0000 0x0 0x1000>;
> + clocks = <&pclk>, <&sysclk>;
> + clock-names = "dsi_p_clk", "dsi_sys_clk";
> + interrupts = <1>;
> + phys = <&dphy1>;
> + phy-names = "dphy";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + dsi0_output: endpoint@0 {
> + reg = <0>;
> + remote-endpoint = <&dsi_panel_input>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + endpoint {
> + remote-endpoint = <&xxx_dpi_output>;
> + };
> + };
> + };
> + };
> +
> + i2c {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + bridge@2d {
> + compatible = "ti,sn65dsi86";
> + reg = <0x2d>;
> +
> + vpll-supply = <&src_pp1800_s4a>;
> + vccio-supply = <&src_pp1800_s4a>;
> + vcca-supply = <&src_pp1200_l2a>;
> + vcc-supply = <&src_pp1200_l2a>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + dsi_panel_input: endpoint {
> + remote-endpoint = <&dsi0_output>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + endpoint {
> + remote-endpoint = <&panel_in_edp>;
> + };
> + };
> + };
> + };
> + };
Best regards,
Krzysztof
