On Fri, 24 Jun 2022 at 03:01, Guru Das Srinagesh <quic_gurus@xxxxxxxxxxx> wrote:
>
> On Thu, Jun 23, 2022 at 08:25:42PM +0200, Robert Marko wrote:
> > Convert bindings for Qualcomm SCM to dtschema.
> >
> > SoC compatibles that were used, but not documented were added.
> >
> > Signed-off-by: Robert Marko <robimarko@xxxxxxxxx>
> > ---
> > .../devicetree/bindings/firmware/qcom,scm.txt | 57 --------
> > .../bindings/firmware/qcom,scm.yaml | 124 ++++++++++++++++++
> > 2 files changed, 124 insertions(+), 57 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.txt
> > create mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt
> > deleted file mode 100644
> > index 0f4e5ab26477..000000000000
> > --- a/Documentation/devicetree/bindings/firmware/qcom,scm.txt
> > +++ /dev/null
> > @@ -1,57 +0,0 @@
> > -QCOM Secure Channel Manager (SCM)
> > -
> > -Qualcomm processors include an interface to communicate to the secure firmware.
> > -This interface allows for clients to request different types of actions. These
> > -can include CPU power up/down, HDCP requests, loading of firmware, and other
> > -assorted actions.
> > -
> > -Required properties:
> > -- compatible: must contain one of the following:
> > - * "qcom,scm-apq8064"
> > - * "qcom,scm-apq8084"
> > - * "qcom,scm-ipq4019"
> > - * "qcom,scm-ipq806x"
> > - * "qcom,scm-ipq8074"
> > - * "qcom,scm-mdm9607"
> > - * "qcom,scm-msm8226"
> > - * "qcom,scm-msm8660"
> > - * "qcom,scm-msm8916"
> > - * "qcom,scm-msm8953"
> > - * "qcom,scm-msm8960"
> > - * "qcom,scm-msm8974"
> > - * "qcom,scm-msm8976"
> > - * "qcom,scm-msm8994"
> > - * "qcom,scm-msm8996"
> > - * "qcom,scm-msm8998"
> > - * "qcom,scm-sc7180"
> > - * "qcom,scm-sc7280"
> > - * "qcom,scm-sdm845"
> > - * "qcom,scm-sdx55"
> > - * "qcom,scm-sm6350"
> > - * "qcom,scm-sm8150"
> > - * "qcom,scm-sm8250"
> > - * "qcom,scm-sm8350"
> > - * "qcom,scm-sm8450"
> > - and:
> > - * "qcom,scm"
> > -- clocks: Specifies clocks needed by the SCM interface, if any:
> > - * core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660" and
> > - "qcom,scm-msm8960"
> > - * core, iface and bus clocks required for "qcom,scm-apq8084",
> > - "qcom,scm-msm8916", "qcom,scm-msm8953", "qcom,scm-msm8974" and "qcom,scm-msm8976"
> > -- clock-names: Must contain "core" for the core clock, "iface" for the interface
> > - clock and "bus" for the bus clock per the requirements of the compatible.
> > -- qcom,dload-mode: phandle to the TCSR hardware block and offset of the
> > - download mode control register (optional)
> > -
> > -Example for MSM8916:
> > -
> > - firmware {
> > - scm {
> > - compatible = "qcom,msm8916", "qcom,scm";
> > - clocks = <&gcc GCC_CRYPTO_CLK> ,
> > - <&gcc GCC_CRYPTO_AXI_CLK>,
> > - <&gcc GCC_CRYPTO_AHB_CLK>;
> > - clock-names = "core", "bus", "iface";
> > - };
> > - };
> > diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
> > new file mode 100644
> > index 000000000000..7dd7beb39846
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
> > @@ -0,0 +1,124 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/firmware/qcom,scm.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: QCOM Secure Channel Manager (SCM) bindings
> > +
> > +maintainers:
> > + - Robert Marko <robimarko@xxxxxxxxx>
>
> I'd like to volunteer my name as well, if that's okay:
>
> Guru Das Srinagesh <quic_gurus@xxxxxxxxxxx>
Hi,
Sure, will add you to v2.
>
> > +
> > +description: |
> ...
> > +
> > + '#reset-cells':
> > + const: 1
>
> This isn't part of the original file - could you please explain why this is
> being added?
Yes, its not part of the original file, however I noticed that a lot of SCM
nodes were adding #reset-cells, and upon looking at the SCM code its
clear that it is being registered as a reset controller so #reset-cells are
appropriate.
However, since its not really being used via phandles #reset-cells did
not really matter, hence why I did not add them to be required,
this is something that DT guys can probably clarify.
Regards,
Robert
>
> > +
> > + qcom,dload-mode:
> > + $ref: /schemas/types.yaml#/definitions/phandle-array
> > + description:
> > + Phandle to the TCSR hardware block and offset of the download mode control register
> > +
> > +required:
> > + - compatible
> > +
> > +allOf:
> > + - if:
> > + properties:
> > + compatible:
> > + contains:
> > + enum:
> > + - qcom,scm-apq8064
> > + - qcom,scm-msm8660
> > + - qcom,scm-msm8960
> > + then:
> > + properties:
> > + clocks:
> > + items:
> > + - description: SCM core clock
> > + clock-names:
> > + items:
> > + - const: core
> > +
> > + - if:
> > + properties:
> > + compatible:
> > + contains:
> > + enum:
> > + - qcom,scm-apq8084
> > + - qcom,scm-mdm9607
> > + - qcom,scm-msm8916
> > + - qcom,scm-msm8953
> > + - qcom,scm-msm8974
> > + - qcom,scm-msm8976
> > + then:
> > + properties:
> > + clocks:
> > + items:
> > + - description: SCM core clock
> > + - description: SCM bus clock
> > + - description: SCM interface clock
> > + clock-names:
> > + items:
> > + - const: core
> > + - const: bus
> > + - const: iface
>
> Thanks, I had this YAML conversion patch done locally, but couldn't figure out
> how to represent the above logic in YAML. Thank you for this patch.
>
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/qcom,gcc-msm8916.h>
> > + firmware {
> > + scm {
> > + compatible = "qcom,scm-msm8916", "qcom,scm";
> > +
> > + clocks = <&gcc GCC_CRYPTO_CLK>,
> > + <&gcc GCC_CRYPTO_AXI_CLK>,
> > + <&gcc GCC_CRYPTO_AHB_CLK>;
> > + clock-names = "core", "bus", "iface";
> > + qcom,dload-mode = <&tcsr 0x6100>;
> > + };
> > + };
> > --
> > 2.36.1
> >
