Re: [PATCHv6 1/2] i2c: designware: introduce a custom scl recovery for SoCFPGA platforms

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On 6/21/22 16:37, Wolfram Sang wrote:
On Mon, Jun 20, 2022 at 06:01:08PM -0500, Dinh Nguyen wrote:
The I2C pins on the SoCFPGA platforms do not go through a GPIO module,
thus cannot be recovered by the default method of by doing a GPIO access.
Only a reset of the I2C IP block can a recovery be successful, so this
change effectively resets the I2C controller, NOT any attached clients.

I am afraid here is a serious misunderstanding. The I2C bus recovery
procedure is a documented mechanism how to get a stalled bus back in the
case that a client device holds SDA low. This mechanism consists of 9
SCL pulses. A reset of the IP core is *not a recovery*. If SocFPGA
cannot togle SCL in some way, it cannot do recovery and
adap->bus_recovery_info should be NULL. Or did I miss something?

From the original code, the first mechanism to a recovery is to acquire a GPIO for the SCL line and send the 9 SCL pulses, after that, it does a reset of the I2C module. For the SOCFPGA part, there is no GPIO line for the SCL, thus the I2C module cannot even get a reset. This code allows the function to reset the I2C module for SOCFPGA, which is the 2nd part of the recovery process.


+static int i2c_socfpga_scl_recovery(struct i2c_adapter *adap)
+{
+	struct i2c_bus_recovery_info *bri = adap->bus_recovery_info;
+
+	bri->prepare_recovery(adap);
+	bri->unprepare_recovery(adap);
+
+	return 0;
+}

See, this function is named scl_recovery, but there is no SCL involved.
This is why I think there is the misunderstanding here.


I understand your point here. Perhaps just call it i2c_socfpga_recovery()?

Dinh



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