From: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> The Canaan k210 apparently has a Sysnopsys Designware AXI DMA controller, but according to the documentation & devicetree it has 6 interrupts rather than the standard one. Add a custom compatible that supports the 6 interrupt configuration which falls back to the standard binding which is currently the one in use in the devicetree entry. Link: https://canaan-creative.com/wp-content/uploads/2020/03/kendryte_standalone_programming_guide_20190311144158_en.pdf #Page 58 Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> --- .../bindings/dma/snps,dw-axi-dmac.yaml | 35 ++++++++++++++----- 1 file changed, 26 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml index 4324a94b26b2..bc85598151ef 100644 --- a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml +++ b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml @@ -18,9 +18,13 @@ allOf: properties: compatible: - enum: - - snps,axi-dma-1.01a - - intel,kmb-axi-dma + oneOf: + - items: + - const: canaan,k210-axi-dma + - const: snps,axi-dma-1.01a + - enum: + - snps,axi-dma-1.01a + - intel,kmb-axi-dma reg: minItems: 1 @@ -33,9 +37,6 @@ properties: - const: axidma_ctrl_regs - const: axidma_apb_regs - interrupts: - maxItems: 1 - clocks: items: - description: Bus Clock @@ -92,6 +93,22 @@ properties: minimum: 1 maximum: 256 +if: + properties: + compatible: + contains: + const: canaan,k210-axi-dma + +then: + properties: + interrupts: + maxItems: 6 + +else: + properties: + interrupts: + maxItems: 1 + required: - compatible - reg @@ -105,7 +122,7 @@ required: - snps,priority - snps,block-size -additionalProperties: false +unevaluatedProperties: false examples: - | @@ -113,12 +130,12 @@ examples: #include <dt-bindings/interrupt-controller/irq.h> /* example with snps,dw-axi-dmac */ dmac: dma-controller@80000 { - compatible = "snps,axi-dma-1.01a"; + compatible = "canaan,k210-axi-dma", "snps,axi-dma-1.01a"; reg = <0x80000 0x400>; clocks = <&core_clk>, <&cfgr_clk>; clock-names = "core-clk", "cfgr-clk"; interrupt-parent = <&intc>; - interrupts = <27>; + interrupts = <27>, <28>, <29>, <30>, <31>, <32>; #dma-cells = <1>; dma-channels = <4>; snps,dma-masters = <2>; -- 2.36.1
