On Fri, 10 Jun 2022 02:43:06 +0200, Heiko Stuebner wrote: > The Zicbom operates on a block-size defined for the cpu-core, > which does not necessarily match other cache-sizes used. > > So add the necessary property for the system to know the core's > block-size. > > Signed-off-by: Heiko Stuebner <heiko@xxxxxxxxx> > Reviewed-by: Anup Patel <anup@xxxxxxxxxxxxxx> > --- > Documentation/devicetree/bindings/riscv/cpus.yaml | 5 +++++ > 1 file changed, 5 insertions(+) > Acked-by: Rob Herring <robh@xxxxxxxxxx>
