Re: [PATCH 4/7] soc: mediatek: mutex: add MT8365 support

[Matthias Brugger <matthias.bgg@xxxxxxxxx>]

On 17/06/2022 07:50, CK Hu wrote:
> Hi, Fabien:
>
> On Mon, 2022-05-30 at 22:14 +0200, Fabien Parent wrote:
> > Add mutex support for MT8365 SoC.
>
> Reviewed-by: CK Hu <ck.hu@xxxxxxxxxxxx>

Applied thanks!

> > Signed-off-by: Fabien Parent <fparent@xxxxxxxxxxxx>
> > ---
> >   drivers/soc/mediatek/mtk-mutex.c | 40
> > ++++++++++++++++++++++++++++++++
> >   1 file changed, 40 insertions(+)
> >
> > diff --git a/drivers/soc/mediatek/mtk-mutex.c
> > b/drivers/soc/mediatek/mtk-mutex.c
> > index 981d56967e7a..b8d5c4a62542 100644
> > --- a/drivers/soc/mediatek/mtk-mutex.c
> > +++ b/drivers/soc/mediatek/mtk-mutex.c
> > @@ -110,6 +110,20 @@
> >   #define MT8195_MUTEX_MOD_DISP_DP_INTF0		21
> >   #define MT8195_MUTEX_MOD_DISP_PWM0		27
> >   
> > +#define MT8365_MUTEX_MOD_DISP_OVL0		7
> > +#define MT8365_MUTEX_MOD_DISP_OVL0_2L		8
> > +#define MT8365_MUTEX_MOD_DISP_RDMA0		9
> > +#define MT8365_MUTEX_MOD_DISP_RDMA1		10
> > +#define MT8365_MUTEX_MOD_DISP_WDMA0		11
> > +#define MT8365_MUTEX_MOD_DISP_COLOR0		12
> > +#define MT8365_MUTEX_MOD_DISP_CCORR		13
> > +#define MT8365_MUTEX_MOD_DISP_AAL		14
> > +#define MT8365_MUTEX_MOD_DISP_GAMMA		15
> > +#define MT8365_MUTEX_MOD_DISP_DITHER		16
> > +#define MT8365_MUTEX_MOD_DISP_DSI0		17
> > +#define MT8365_MUTEX_MOD_DISP_PWM0		20
> > +#define MT8365_MUTEX_MOD_DISP_DPI0		22
> > +
> >   #define MT2712_MUTEX_MOD_DISP_PWM2		10
> >   #define MT2712_MUTEX_MOD_DISP_OVL0		11
> >   #define MT2712_MUTEX_MOD_DISP_OVL1		12
> > @@ -315,6 +329,22 @@ static const unsigned int
> > mt8195_mutex_mod[DDP_COMPONENT_ID_MAX] = {
> >   	[DDP_COMPONENT_DP_INTF0] = MT8195_MUTEX_MOD_DISP_DP_INTF0,
> >   };
> >   
> > +static const unsigned int mt8365_mutex_mod[DDP_COMPONENT_ID_MAX] = {
> > +	[DDP_COMPONENT_AAL0] = MT8365_MUTEX_MOD_DISP_AAL,
> > +	[DDP_COMPONENT_CCORR] = MT8365_MUTEX_MOD_DISP_CCORR,
> > +	[DDP_COMPONENT_COLOR0] = MT8365_MUTEX_MOD_DISP_COLOR0,
> > +	[DDP_COMPONENT_DITHER] = MT8365_MUTEX_MOD_DISP_DITHER,
> > +	[DDP_COMPONENT_DPI0] = MT8365_MUTEX_MOD_DISP_DPI0,
> > +	[DDP_COMPONENT_DSI0] = MT8365_MUTEX_MOD_DISP_DSI0,
> > +	[DDP_COMPONENT_GAMMA] = MT8365_MUTEX_MOD_DISP_GAMMA,
> > +	[DDP_COMPONENT_OVL0] = MT8365_MUTEX_MOD_DISP_OVL0,
> > +	[DDP_COMPONENT_OVL_2L0] = MT8365_MUTEX_MOD_DISP_OVL0_2L,
> > +	[DDP_COMPONENT_PWM0] = MT8365_MUTEX_MOD_DISP_PWM0,
> > +	[DDP_COMPONENT_RDMA0] = MT8365_MUTEX_MOD_DISP_RDMA0,
> > +	[DDP_COMPONENT_RDMA1] = MT8365_MUTEX_MOD_DISP_RDMA1,
> > +	[DDP_COMPONENT_WDMA0] = MT8365_MUTEX_MOD_DISP_WDMA0,
> > +};
> > +
> >   static const unsigned int mt2712_mutex_sof[DDP_MUTEX_SOF_MAX] = {
> >   	[MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE,
> >   	[MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0,
> > @@ -423,6 +453,14 @@ static const struct mtk_mutex_data
> > mt8195_mutex_driver_data = {
> >   	.mutex_sof_reg = MT8183_MUTEX0_SOF0,
> >   };
> >   
> > +static const struct mtk_mutex_data mt8365_mutex_driver_data = {
> > +	.mutex_mod = mt8365_mutex_mod,
> > +	.mutex_sof = mt8183_mutex_sof,
> > +	.mutex_mod_reg = MT8183_MUTEX0_MOD0,
> > +	.mutex_sof_reg = MT8183_MUTEX0_SOF0,
> > +	.no_clk = true,
> > +};
> > +
> >   struct mtk_mutex *mtk_mutex_get(struct device *dev)
> >   {
> >   	struct mtk_mutex_ctx *mtx = dev_get_drvdata(dev);
> > @@ -665,6 +703,8 @@ static const struct of_device_id
> > mutex_driver_dt_match[] = {
> >   	  .data = &mt8192_mutex_driver_data},
> >   	{ .compatible = "mediatek,mt8195-disp-mutex",
> >   	  .data = &mt8195_mutex_driver_data},
> > +	{ .compatible = "mediatek,mt8365-disp-mutex",
> > +	  .data = &mt8365_mutex_driver_data},
> >   	{},
> >   };
> >   MODULE_DEVICE_TABLE(of, mutex_driver_dt_match);