From: Brad Larson <blarson@xxxxxxx>
AMD Pensando Elba ARM 64-bit SoC is integrated with this IP and
explicitly controls byte-lane enables.
Signed-off-by: Brad Larson <blarson@xxxxxxx>
---
.../devicetree/bindings/mmc/cdns,sdhci.yaml | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
index 4207fed62dfe..35bc4cf6f214 100644
--- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
+++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
@@ -13,10 +13,24 @@ maintainers:
allOf:
- $ref: mmc-controller.yaml
+ - if:
+ properties:
+ compatible:
+ enum:
+ - amd,pensando-elba-sd4hc
+ then:
+ properties:
+ reg:
+ items:
+ - description: Cadence host controller registers
+ - description: Byte-lane control register
+ minItems: 2
+
properties:
compatible:
items:
- enum:
+ - amd,pensando-elba-sd4hc
- microchip,mpfs-sd4hc
- socionext,uniphier-sd4hc
- const: cdns,sd4hc
--
2.17.1
