From: Linh Phung <linh.phung.jy@xxxxxxxxxxx>
Extracted from a bigger patch in the BSP, rebased, reg length corrected,
and DMA properties added. SCIF0 works fine, SCIF1+4 skipped because they
haven't been tested yet.
Signed-off-by: Linh Phung <linh.phung.jy@xxxxxxxxxxx>
Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/renesas/r8a779f0.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
index c872030ec4fe..2cae951c4375 100644
--- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
@@ -305,6 +305,23 @@ hscif1: serial@e6550000 {
status = "disabled";
};
+ scif0: serial@e6e60000 {
+ compatible = "renesas,scif-r8a779f0",
+ "renesas,rcar-gen4-scif", "renesas,scif";
+ reg = <0 0xe6e60000 0 64>;
+ interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 702>,
+ <&cpg CPG_CORE R8A779F0_CLK_S0D3_PER>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x51>, <&dmac0 0x50>,
+ <&dmac1 0x51>, <&dmac1 0x50>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
+ resets = <&cpg 702>;
+ status = "disabled";
+ };
+
scif3: serial@e6c50000 {
compatible = "renesas,scif-r8a779f0",
"renesas,rcar-gen4-scif", "renesas,scif";
--
2.35.1
