Re: [PATCH 2/2] ARM: dts: stm32: remove the IPCC "wakeup" IRQ on stm32mp151

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Hi Fabien

On 5/3/22 16:56, Fabien Dessenne wrote:
The stm32 ipcc mailbox driver supports only two interrupts (rx and tx), so
remove the unsupported "wakeup" one.
Note that the EXTI interrupt 61 has two roles : it is hierarchically linked
to the GIC IPCC "rx" interrupt, and it acts as a wakeup source.

Signed-off-by: Fabien Dessenne <fabien.dessenne@xxxxxxxxxxx>
---
  arch/arm/boot/dts/stm32mp151.dtsi | 7 +++----
  1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi
index 7fdc324b3cf9..edc0a1641c7b 100644
--- a/arch/arm/boot/dts/stm32mp151.dtsi
+++ b/arch/arm/boot/dts/stm32mp151.dtsi
@@ -1117,10 +1117,9 @@ ipcc: mailbox@4c001000 {
  			reg = <0x4c001000 0x400>;
  			st,proc-id = <0>;
  			interrupts-extended =
-				<&intc GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
-				<&intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
-				<&exti 61 1>;
-			interrupt-names = "rx", "tx", "wakeup";
+				<&exti 61 1>,
+				<&intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "rx", "tx";
  			clocks = <&rcc IPCC>;
  			wakeup-source;
  			status = "disabled";

Applied on stm32-next.

Thanks.
Alex



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