On Sun, Jun 12, 2022 at 02:15:00PM -0500, Samuel Holland wrote: > > +config RISCV_ISA_ZICBOM > > + bool "Zicbom extension support for non-coherent dma operation" > > + select ARCH_HAS_DMA_PREP_COHERENT > > + select ARCH_HAS_SYNC_DMA_FOR_DEVICE > > + select ARCH_HAS_SYNC_DMA_FOR_CPU > > + select ARCH_HAS_SETUP_DMA_OPS > > ARCH_HAS_SETUP_DMA_OPS needs to be separate from the non-coherent DMA option, > because iommu_setup_dma_ops() will need to be called from arch_setup_dma_ops() > even on a fully-coherent system. (But this change is not strictly necessary for > this series.) It doesn't need to be separate, you can just add another select for the symbol. > > + case DMA_FROM_DEVICE: > > + ALT_CMO_OP(INVAL, (unsigned long)phys_to_virt(paddr), size, riscv_cbom_block_size); > > + break; > > arch_sync_dma_for_device(DMA_FROM_DEVICE) is a no-op from the CPU's perspective. > Invalidating the CPU's cache goes in arch_sync_dma_for_cpu(DMA_FROM_DEVICE). Only if you guarantee that there is never any speculation. See: https://lore.kernel.org/lkml/20180518175004.GF17671@xxxxxxxxxxxxxxxxxxxxx
